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[174.21.6.47]) by smtp.gmail.com with ESMTPSA id z125sm182023pfz.27.2018.01.21.19.43.09 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 21 Jan 2018 19:43:09 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 21 Jan 2018 19:42:08 -0800 Message-Id: <20180122034217.19593-35-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180122034217.19593-1-richard.henderson@linaro.org> References: <20180122034217.19593-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::242 Subject: [Qemu-devel] [PULL 34/43] target/hppa: Use MMU_DEBUG_LOAD when reloading for CR[IIR] X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Bypass any tlb protection checks, as this is not a "real" access to memory per the architecture. Signed-off-by: Richard Henderson --- target/hppa/int_helper.c | 2 +- target/hppa/mem_helper.c | 19 ++++++++++++++----- 2 files changed, 15 insertions(+), 6 deletions(-) -- 2.14.3 diff --git a/target/hppa/int_helper.c b/target/hppa/int_helper.c index ee72769544..e831944b8d 100644 --- a/target/hppa/int_helper.c +++ b/target/hppa/int_helper.c @@ -154,7 +154,7 @@ void hppa_cpu_do_interrupt(CPUState *cs) int prot, t; vaddr = hppa_form_gva_psw(old_psw, iasq_f, iaoq_f & -4); - t = hppa_get_physical_address(env, vaddr, 0, MMU_INST_FETCH, + t = hppa_get_physical_address(env, vaddr, 0, MMU_DEBUG_LOAD, &paddr, &prot); if (t >= 0) { /* We can't re-load the instruction. */ diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c index a0a385cb54..4bdc4d77e5 100644 --- a/target/hppa/mem_helper.c +++ b/target/hppa/mem_helper.c @@ -131,12 +131,21 @@ int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx, /* ??? Check PSW_P and ent->access_prot. This can remove PROT_WRITE. */ /* Map MMUAccessType to QEMU protection. */ - if (ifetch) { - a_prot = PROT_EXEC; - } else if (type == MMU_DATA_STORE) { - a_prot = PROT_WRITE; - } else { + switch (type) { + case MMU_DATA_LOAD: a_prot = PROT_READ; + break; + case MMU_DATA_STORE: + a_prot = PROT_WRITE; + break; + case MMU_INST_FETCH: + a_prot = PROT_EXEC; + break; + case MMU_DEBUG_LOAD: + ret = -1; + goto egress; + default: + g_assert_not_reached(); } if (unlikely(!(prot & a_prot))) {