Message ID | 20171016172609.23422-12-richard.henderson@linaro.org |
---|---|
State | Superseded |
Headers | show
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[97.126.104.76]) by smtp.gmail.com with ESMTPSA id i187sm5594249pfc.96.2017.10.16.10.26.27 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 16 Oct 2017 10:26:27 -0700 (PDT) From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Date: Mon, 16 Oct 2017 10:25:30 -0700 Message-Id: <20171016172609.23422-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171016172609.23422-1-richard.henderson@linaro.org> References: <20171016172609.23422-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::234 Subject: [Qemu-devel] [PATCH v6 11/50] tcg: Change temp_allocate_frame arg to TCGTemp X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel/> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Cc: cota@braap.org, Richard Henderson <rth@twiddle.net> Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org> |
Series |
tcg tb_lock removal
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expand
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On Mon, Oct 16, 2017 at 10:25:30 -0700, Richard Henderson wrote: > From: Richard Henderson <rth@twiddle.net> > > Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Emilio G. Cota <cota@braap.org> E.
diff --git a/tcg/tcg.c b/tcg/tcg.c index bb342e06dd..163ec8b1c0 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -2103,10 +2103,8 @@ static void check_regs(TCGContext *s) } #endif -static void temp_allocate_frame(TCGContext *s, int temp) +static void temp_allocate_frame(TCGContext *s, TCGTemp *ts) { - TCGTemp *ts; - ts = &s->temps[temp]; #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64) /* Sparc64 stack is accessed with offset of 2047 */ s->current_frame_offset = (s->current_frame_offset + @@ -2159,7 +2157,7 @@ static void temp_sync(TCGContext *s, TCGTemp *ts, } if (!ts->mem_coherent) { if (!ts->mem_allocated) { - temp_allocate_frame(s, temp_idx(s, ts)); + temp_allocate_frame(s, ts); } switch (ts->val_type) { case TEMP_VAL_CONST: @@ -2389,7 +2387,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op) liveness analysis disabled). */ tcg_debug_assert(NEED_SYNC_ARG(0)); if (!ots->mem_allocated) { - temp_allocate_frame(s, op->args[0]); + temp_allocate_frame(s, ots); } tcg_out_st(s, otype, ts->reg, ots->mem_base->reg, ots->mem_offset); if (IS_DEAD_ARG(1)) {