@@ -117,4 +117,6 @@ static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
__builtin___clear_cache((char *)start, (char *)stop);
}
+#define TCG_TARGET_DEFAULT_MO (0)
+
#endif /* AARCH64_TCG_TARGET_H */
@@ -134,4 +134,6 @@ static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
__builtin___clear_cache((char *) start, (char *) stop);
}
+#define TCG_TARGET_DEFAULT_MO (0)
+
#endif
@@ -206,4 +206,6 @@ static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
cacheflush ((void *)start, stop-start, ICACHE);
}
+#define TCG_TARGET_DEFAULT_MO (0)
+
#endif
@@ -125,4 +125,6 @@ extern bool have_isa_3_00;
void flush_icache_range(uintptr_t start, uintptr_t stop);
+#define TCG_TARGET_DEFAULT_MO (0)
+
#endif
@@ -133,6 +133,8 @@ extern uint64_t s390_facilities;
#define TCG_TARGET_EXTEND_ARGS 1
+#define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
+
enum {
TCG_AREG0 = TCG_REG_R10,
};
@@ -162,6 +162,8 @@ extern bool use_vis3_instructions;
#define TCG_AREG0 TCG_REG_I0
+#define TCG_TARGET_DEFAULT_MO (0)
+
static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
{
uintptr_t p;