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X-Received-From: 2a00:1450:400c:c0c::232 Subject: [Qemu-devel] [RFC PATCH 6/9] target/arm/translate-a64: regnames -> x_regnames X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" These are the integer registers as will become clear when we start declaring the vector ones. Signed-off-by: Alex Bennée --- target/arm/translate-a64.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.13.0 diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 2200e25be0..805af51900 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -43,7 +43,7 @@ static TCGv_i64 cpu_pc; static TCGv_i64 cpu_exclusive_high; static TCGv_i64 cpu_reg(DisasContext *s, int reg); -static const char *regnames[] = { +static const char *x_regnames[] = { "x0", "x1", "x2", "x3", "x4", "x5", "x6", "x7", "x8", "x9", "x10", "x11", "x12", "x13", "x14", "x15", "x16", "x17", "x18", "x19", "x20", "x21", "x22", "x23",