From patchwork Thu Feb 9 17:09:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 93762 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp115895qgi; Thu, 9 Feb 2017 09:41:15 -0800 (PST) X-Received: by 10.237.41.229 with SMTP id o92mr3719050qtd.223.1486662075872; Thu, 09 Feb 2017 09:41:15 -0800 (PST) Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id h62si8520333qkc.91.2017.02.09.09.41.15 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 09 Feb 2017 09:41:15 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:39375 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cbsiX-0001fk-IC for patch@linaro.org; Thu, 09 Feb 2017 12:41:13 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56922) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cbsDZ-0006Qr-4P for qemu-devel@nongnu.org; Thu, 09 Feb 2017 12:09:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cbsDX-0002Y6-U7 for qemu-devel@nongnu.org; Thu, 09 Feb 2017 12:09:13 -0500 Received: from mail-wm0-x22b.google.com ([2a00:1450:400c:c09::22b]:38604) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cbsDX-0002Xr-Ne for qemu-devel@nongnu.org; Thu, 09 Feb 2017 12:09:11 -0500 Received: by mail-wm0-x22b.google.com with SMTP id r141so25980422wmg.1 for ; Thu, 09 Feb 2017 09:09:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=AFXIcNzA/OuAlli7Th/ECbxSrrSA1bt3J9EeXr8uQ8A=; b=Ih4paaBAOHfHhiL+Kn7ea1rwCm691AygLqYrzTGURw4NNyip12OBd+a4HU1ns7EdJT YWQVzSGf0kJfGIzDW/36iby7FDn51ABHTwBsL7o0xyXZKhSQ3URDSAYq7ue2GSazkzuG lqjZ9jpmOJlFZ0J0vNrctKLzi4Mwxd4ht3M+4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=AFXIcNzA/OuAlli7Th/ECbxSrrSA1bt3J9EeXr8uQ8A=; b=PtiFnE7gWj9xtEX4mq6X/RggNQeWNZEhHe1tS9f1WOrj5XmFXkW/+gQfnhPaxndbfY eRteMTxF1zlHUhAwASJT+yxG1zKmz338uZZ8Kjyf5BGLrZJ/viedlG3pNJm0LWW3wPYF hmsUmSdiOdC/2azxD/jBLSHuB3JvcDX1Mc18+RZOBQpEGcUYdjRHd1lV6urY25hdiRu+ OTH1z1rO3MkztgND2d8CE6ax8b5BZQmnM9Pm48N2y3n8u7dJyL3IIss+6exyH07vB0kK aO/1KThcc4q/HkOx83uPSbsf1sWgDDxp0JaPCdqnLafFauC2dPtY6HykVHsHnnpk0c7M YXgw== X-Gm-Message-State: AMke39m+1mG5K1AR/WSgpzybn2Uc+cRQkWTDw59AJbk3+J8ZRGz6BXtWsfUVVU88fCme+3Jo X-Received: by 10.28.101.214 with SMTP id z205mr25382567wmb.15.1486660150602; Thu, 09 Feb 2017 09:09:10 -0800 (PST) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id w70sm19348380wrc.47.2017.02.09.09.09.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 09 Feb 2017 09:09:04 -0800 (PST) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 6EDF43E2D8B; Thu, 9 Feb 2017 17:09:06 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: peter.maydell@linaro.org, rth@twiddle.net Date: Thu, 9 Feb 2017 17:09:01 +0000 Message-Id: <20170209170904.5713-22-alex.bennee@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170209170904.5713-1-alex.bennee@linaro.org> References: <20170209170904.5713-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::22b Subject: [Qemu-devel] [PATCH v11 21/24] target-arm: don't generate WFE/YIELD calls for MTTCG X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mttcg@listserver.greensocs.com, nikunj@linux.vnet.ibm.com, jan.kiszka@siemens.com, mark.burton@greensocs.com, a.rigo@virtualopensystems.com, qemu-devel@nongnu.org, cota@braap.org, "open list:ARM" , serge.fdrv@gmail.com, pbonzini@redhat.com, bobby.prani@gmail.com, =?utf-8?q?Alex_Benn=C3=A9e?= , bamvor.zhangjian@linaro.org, fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The WFE and YIELD instructions are really only hints and in TCG's case they were useful to move the scheduling on from one vCPU to the next. In the parallel context (MTTCG) this just causes an unnecessary cpu_exit and contention of the BQL. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson Reviewed-by: Peter Maydell --- target/arm/op_helper.c | 7 +++++++ target/arm/translate-a64.c | 8 ++++++-- target/arm/translate.c | 20 ++++++++++++++++---- 3 files changed, 29 insertions(+), 6 deletions(-) -- 2.11.0 diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c index e1a883c595..abfa7cdd39 100644 --- a/target/arm/op_helper.c +++ b/target/arm/op_helper.c @@ -436,6 +436,13 @@ void HELPER(yield)(CPUARMState *env) ARMCPU *cpu = arm_env_get_cpu(env); CPUState *cs = CPU(cpu); + /* When running in MTTCG we don't generate jumps to the yield and + * WFE helpers as it won't affect the scheduling of other vCPUs. + * If we wanted to more completely model WFE/SEV so we don't busy + * spin unnecessarily we would need to do something more involved. + */ + g_assert(!parallel_cpus); + /* This is a non-trappable hint instruction that generally indicates * that the guest is currently busy-looping. Yield control back to the * top level loop so that a more deserving VCPU has a chance to run. diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index d0352e2045..7e7131fe2f 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -1342,10 +1342,14 @@ static void handle_hint(DisasContext *s, uint32_t insn, s->is_jmp = DISAS_WFI; return; case 1: /* YIELD */ - s->is_jmp = DISAS_YIELD; + if (!parallel_cpus) { + s->is_jmp = DISAS_YIELD; + } return; case 2: /* WFE */ - s->is_jmp = DISAS_WFE; + if (!parallel_cpus) { + s->is_jmp = DISAS_WFE; + } return; case 4: /* SEV */ case 5: /* SEVL */ diff --git a/target/arm/translate.c b/target/arm/translate.c index 493c627bcf..24faa7c60c 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -4345,20 +4345,32 @@ static void gen_exception_return(DisasContext *s, TCGv_i32 pc) gen_rfe(s, pc, load_cpu_field(spsr)); } +/* + * For WFI we will halt the vCPU until an IRQ. For WFE and YIELD we + * only call the helper when running single threaded TCG code to ensure + * the next round-robin scheduled vCPU gets a crack. In MTTCG mode we + * just skip this instruction. Currently the SEV/SEVL instructions + * which are *one* of many ways to wake the CPU from WFE are not + * implemented so we can't sleep like WFI does. + */ static void gen_nop_hint(DisasContext *s, int val) { switch (val) { case 1: /* yield */ - gen_set_pc_im(s, s->pc); - s->is_jmp = DISAS_YIELD; + if (!parallel_cpus) { + gen_set_pc_im(s, s->pc); + s->is_jmp = DISAS_YIELD; + } break; case 3: /* wfi */ gen_set_pc_im(s, s->pc); s->is_jmp = DISAS_WFI; break; case 2: /* wfe */ - gen_set_pc_im(s, s->pc); - s->is_jmp = DISAS_WFE; + if (!parallel_cpus) { + gen_set_pc_im(s, s->pc); + s->is_jmp = DISAS_WFE; + } break; case 4: /* sev */ case 5: /* sevl */