From patchwork Wed Feb 1 15:05:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 93053 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp2462080qgi; Wed, 1 Feb 2017 07:12:55 -0800 (PST) X-Received: by 10.200.50.209 with SMTP id a17mr3502097qtb.288.1485961975627; Wed, 01 Feb 2017 07:12:55 -0800 (PST) Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id d4si14615665qtf.33.2017.02.01.07.12.55 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 01 Feb 2017 07:12:55 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:51462 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cYwad-0004RX-4K for patch@linaro.org; Wed, 01 Feb 2017 10:12:55 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37060) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cYwTw-00071p-R0 for qemu-devel@nongnu.org; Wed, 01 Feb 2017 10:06:01 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cYwTr-0008B8-0E for qemu-devel@nongnu.org; Wed, 01 Feb 2017 10:06:00 -0500 Received: from mail-wm0-x235.google.com ([2a00:1450:400c:c09::235]:34994) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cYwTq-0008Ar-Mj for qemu-devel@nongnu.org; Wed, 01 Feb 2017 10:05:54 -0500 Received: by mail-wm0-x235.google.com with SMTP id b65so43288727wmf.0 for ; Wed, 01 Feb 2017 07:05:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=SUFcEMEJiDZg2OfpFdj6GgNRlPAAm96SaC5UdBFeG8w=; b=ircQ0V1b71ONPyCEo1j7C1POA5kvwdtGsTvhuzTV7h62iq2huyfnXW/MmlP0QBTcBr dfV69hQpxxohTwXcpUKb9jEG0gsCuK+c9FkySRy05UYyeLhNzwAUBYXFwETWNY6eLAYH Mg4IIou4zNu/ATMy1hH68zPAF3jLhWJCn+6Vo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SUFcEMEJiDZg2OfpFdj6GgNRlPAAm96SaC5UdBFeG8w=; b=WEoXKKfCnl3co70AJD4biaH7ZNKue6onX5urMw6kKnorBfqAYCAy671YpJrWuF94fY QOn+jFZJkR8uxJjR+46DFGdikTnjgi+ApWunEdfh6CJNFfgR18mm4WPgaH7saAX4951T AOXpLNL2wDiMX7RjSm5zY9g7hB8AOVuRYhiSIlmd8LVyjLrJf22YyKf4JyJO7+drBUAQ dBVXvwWgcaWQ4d9SI2CuLkNkLgZEtXMzWLqPPjmfPsnUOAsU85B2SDErdAMw4wHzURX/ NH3ahl3zNdRfFrOWbgvLkWVIMB8wUvf7gC/tdcyDCsGTqPUE50fkgbx1OS2K/Wp3kEoU Rw4A== X-Gm-Message-State: AIkVDXIfDzY5WeVEC6dbkD/LsM6fWRvoYgOCpZQERwcajSfodihUHYJOT5NeWcsoWwWFqJ3x X-Received: by 10.28.181.145 with SMTP id e139mr3208190wmf.103.1485961553462; Wed, 01 Feb 2017 07:05:53 -0800 (PST) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id 18sm34541765wrb.14.2017.02.01.07.05.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 01 Feb 2017 07:05:51 -0800 (PST) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 705F33E097D; Wed, 1 Feb 2017 15:05:53 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: mttcg@listserver.greensocs.com, qemu-devel@nongnu.org, fred.konrad@greensocs.com, a.rigo@virtualopensystems.com, cota@braap.org, bobby.prani@gmail.com, nikunj@linux.vnet.ibm.com Date: Wed, 1 Feb 2017 15:05:30 +0000 Message-Id: <20170201150553.9381-3-alex.bennee@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170201150553.9381-1-alex.bennee@linaro.org> References: <20170201150553.9381-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::235 Subject: [Qemu-devel] [PATCH v9 02/25] mttcg: translate-all: Enable locking debug in a debug build X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Peter Crosthwaite , jan.kiszka@siemens.com, mark.burton@greensocs.com, serge.fdrv@gmail.com, pbonzini@redhat.com, =?utf-8?q?Alex_Benn=C3=A9e?= , bamvor.zhangjian@linaro.org, rth@twiddle.net Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Pranith Kumar Enable tcg lock debug asserts in a debug build by default instead of relying on DEBUG_LOCKING. None of the other DEBUG_* macros have asserts, so this patch removes DEBUG_LOCKING and enable these asserts in a debug build. CC: Richard Henderson Signed-off-by: Pranith Kumar [AJB: tweak ifdefs so can be early in series] Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- translate-all.c | 52 ++++++++++++++++------------------------------------ 1 file changed, 16 insertions(+), 36 deletions(-) -- 2.11.0 diff --git a/translate-all.c b/translate-all.c index 6d2fcabca7..708d5cc3d7 100644 --- a/translate-all.c +++ b/translate-all.c @@ -59,7 +59,6 @@ /* #define DEBUG_TB_INVALIDATE */ /* #define DEBUG_TB_FLUSH */ -/* #define DEBUG_LOCKING */ /* make various TB consistency checks */ /* #define DEBUG_TB_CHECK */ @@ -74,20 +73,10 @@ * access to the memory related structures are protected with the * mmap_lock. */ -#ifdef DEBUG_LOCKING -#define DEBUG_MEM_LOCKS 1 -#else -#define DEBUG_MEM_LOCKS 0 -#endif - #ifdef CONFIG_SOFTMMU #define assert_memory_lock() do { /* nothing */ } while (0) #else -#define assert_memory_lock() do { \ - if (DEBUG_MEM_LOCKS) { \ - g_assert(have_mmap_lock()); \ - } \ - } while (0) +#define assert_memory_lock() tcg_debug_assert(have_mmap_lock()) #endif #define SMC_BITMAP_USE_THRESHOLD 10 @@ -169,10 +158,18 @@ static void page_table_config_init(void) assert(v_l2_levels >= 0); } +#ifdef CONFIG_USER_ONLY +#define assert_tb_locked() tcg_debug_assert(have_tb_lock) +#define assert_tb_unlocked() tcg_debug_assert(!have_tb_lock) +#else +#define assert_tb_locked() do { /* nothing */ } while (0) +#define assert_tb_unlocked() do { /* nothing */ } while (0) +#endif + void tb_lock(void) { #ifdef CONFIG_USER_ONLY - assert(!have_tb_lock); + assert_tb_unlocked(); qemu_mutex_lock(&tcg_ctx.tb_ctx.tb_lock); have_tb_lock++; #endif @@ -181,7 +178,7 @@ void tb_lock(void) void tb_unlock(void) { #ifdef CONFIG_USER_ONLY - assert(have_tb_lock); + assert_tb_locked(); have_tb_lock--; qemu_mutex_unlock(&tcg_ctx.tb_ctx.tb_lock); #endif @@ -197,23 +194,6 @@ void tb_lock_reset(void) #endif } -#ifdef DEBUG_LOCKING -#define DEBUG_TB_LOCKS 1 -#else -#define DEBUG_TB_LOCKS 0 -#endif - -#ifdef CONFIG_SOFTMMU -#define assert_tb_lock() do { /* nothing */ } while (0) -#else -#define assert_tb_lock() do { \ - if (DEBUG_TB_LOCKS) { \ - g_assert(have_tb_lock); \ - } \ - } while (0) -#endif - - static TranslationBlock *tb_find_pc(uintptr_t tc_ptr); void cpu_gen_init(void) @@ -847,7 +827,7 @@ static TranslationBlock *tb_alloc(target_ulong pc) { TranslationBlock *tb; - assert_tb_lock(); + assert_tb_locked(); if (tcg_ctx.tb_ctx.nb_tbs >= tcg_ctx.code_gen_max_blocks) { return NULL; @@ -862,7 +842,7 @@ static TranslationBlock *tb_alloc(target_ulong pc) /* Called with tb_lock held. */ void tb_free(TranslationBlock *tb) { - assert_tb_lock(); + assert_tb_locked(); /* In practice this is mostly used for single use temporary TB Ignore the hard cases and just back up if this TB happens to @@ -1104,7 +1084,7 @@ void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr) uint32_t h; tb_page_addr_t phys_pc; - assert_tb_lock(); + assert_tb_locked(); atomic_set(&tb->invalid, true); @@ -1421,7 +1401,7 @@ static void tb_invalidate_phys_range_1(tb_page_addr_t start, tb_page_addr_t end) #ifdef CONFIG_SOFTMMU void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end) { - assert_tb_lock(); + assert_tb_locked(); tb_invalidate_phys_range_1(start, end); } #else @@ -1464,7 +1444,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end, #endif /* TARGET_HAS_PRECISE_SMC */ assert_memory_lock(); - assert_tb_lock(); + assert_tb_locked(); p = page_find(start >> TARGET_PAGE_BITS); if (!p) {