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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id f37si3301555qte.335.2017.01.27.03.26.22 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 27 Jan 2017 03:26:23 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:44497 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cX4fc-0005f7-Ns for patch@linaro.org; Fri, 27 Jan 2017 06:26:20 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49575) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cX40L-0007e1-Nf for qemu-devel@nongnu.org; Fri, 27 Jan 2017 05:43:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cX40L-0004hT-22 for qemu-devel@nongnu.org; Fri, 27 Jan 2017 05:43:41 -0500 Received: from mail-wm0-x231.google.com ([2a00:1450:400c:c09::231]:38210) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cX40K-0004gi-SD for qemu-devel@nongnu.org; Fri, 27 Jan 2017 05:43:40 -0500 Received: by mail-wm0-x231.google.com with SMTP id r144so130192458wme.1 for ; Fri, 27 Jan 2017 02:43:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jTdkzqovOaa/vHi9qgvcJFTj3jqkbsRN9xvWUg//VFM=; b=DT9DKIu5/HSoPhLJDzqo+ihoEkx/KZ0lFmNZhRCg/FvOA1kV1xJT1UNggY3zTaxHKh WpMvrzQQzJEekkp+cDc5TajsK/ftF/+OVWu8WJ6RRacCMJ8Y5Jh1AxNtkVgo8QfNuzR/ R6BP5Pz6OhsqxJfvkPBp51W5GuhtnngvfFtWk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jTdkzqovOaa/vHi9qgvcJFTj3jqkbsRN9xvWUg//VFM=; b=oYJsV8HvU7saKSFJuHsYT9TNGk8+CmBVzI2nE9K/3bGXLnlU34pWAKflE0mFLGKQhT iIAQP4dTSGVI1VSlg2kCRqKoTZJ5FdeeRa/I8ZHCQlMprgBTYxoOVhy1dfnODgk9pRz2 rGVDOo69eWd+1E0VKplPcvCC3BXpprNT/jhTnqAEBg9anMpHTqJJz2qq5G1dCsQDCGvi 5nvlCcrixqIo6oOG81rFAFebwWRGf++WusmOWioKcENqNLnwlQiJLZ4n+7GLKaziEiTq JIgrWvTP0lNy5uyQrSF/MGPJIYo3/wbOALt7nfiZO0MHeonVX9WzyNVJPm65Ci6Wb0B2 xOTA== X-Gm-Message-State: AIkVDXJUuSq3p9qo1UCTcQ+2UpQEl8ESksdq4MnlDdBVb2MsNuQw73w/YW7fBTQXH/IWVlqJ X-Received: by 10.223.172.17 with SMTP id v17mr6811481wrc.115.1485513819773; Fri, 27 Jan 2017 02:43:39 -0800 (PST) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id q5sm7241288wrd.32.2017.01.27.02.43.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 27 Jan 2017 02:43:38 -0800 (PST) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 4B4413E3770; Fri, 27 Jan 2017 10:35:07 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: Date: Fri, 27 Jan 2017 10:35:03 +0000 Message-Id: <20170127103505.18606-24-alex.bennee@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170127103505.18606-1-alex.bennee@linaro.org> References: <20170127103505.18606-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::231 Subject: [Qemu-devel] [PATCH v8 23/25] target-arm: introduce ARM_CP_EXIT_PC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , "open list:ARM" , =?utf-8?q?Alex_Benn=C3=A9e?= , "open list:All patches CC here" Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Some helpers may trigger an immediate exit of the cpu_loop. If this happens the PC need to be rectified to ensure the restart will begin on the next instruction. Signed-off-by: Alex Bennée --- target/arm/cpu.h | 3 ++- target/arm/translate-a64.c | 4 ++++ target/arm/translate.c | 4 ++++ 3 files changed, 10 insertions(+), 1 deletion(-) -- 2.11.0 diff --git a/target/arm/cpu.h b/target/arm/cpu.h index f56a96c675..1b0670ae11 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1411,7 +1411,8 @@ static inline uint64_t cpreg_to_kvm_id(uint32_t cpregid) #define ARM_CP_NZCV (ARM_CP_SPECIAL | (3 << 8)) #define ARM_CP_CURRENTEL (ARM_CP_SPECIAL | (4 << 8)) #define ARM_CP_DC_ZVA (ARM_CP_SPECIAL | (5 << 8)) -#define ARM_LAST_SPECIAL ARM_CP_DC_ZVA +#define ARM_CP_EXIT_PC (ARM_CP_SPECIAL | (6 << 8)) +#define ARM_LAST_SPECIAL ARM_CP_EXIT_PC /* Used only as a terminator for ARMCPRegInfo lists */ #define ARM_CP_SENTINEL 0xffff /* Mask of only the flag bits in a type field */ diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 05162f335e..a3f37d8bec 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -1561,6 +1561,10 @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread, tcg_rt = cpu_reg(s, rt); gen_helper_dc_zva(cpu_env, tcg_rt); return; + case ARM_CP_EXIT_PC: + /* The helper may exit the cpu_loop so ensure PC is correct */ + gen_a64_set_pc_im(s->pc); + break; default: break; } diff --git a/target/arm/translate.c b/target/arm/translate.c index 444a24c2b6..7bd18cd25d 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -7508,6 +7508,10 @@ static int disas_coproc_insn(DisasContext *s, uint32_t insn) gen_set_pc_im(s, s->pc); s->is_jmp = DISAS_WFI; return 0; + case ARM_CP_EXIT_PC: + /* The helper may exit the cpu_loop so ensure PC is correct */ + gen_set_pc_im(s, s->pc); + break; default: break; }