From patchwork Thu Jan 19 17:05:03 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 91995 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp384647qgi; Thu, 19 Jan 2017 09:20:25 -0800 (PST) X-Received: by 10.55.99.81 with SMTP id x78mr9762707qkb.62.1484846425272; Thu, 19 Jan 2017 09:20:25 -0800 (PST) Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id r8si3032116qte.59.2017.01.19.09.20.24 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 19 Jan 2017 09:20:25 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:49871 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cUGNq-00035u-QX for patch@linaro.org; Thu, 19 Jan 2017 12:20:22 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40662) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cUGGX-0005Wu-NN for qemu-devel@nongnu.org; Thu, 19 Jan 2017 12:12:50 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cUGGW-0001iF-HB for qemu-devel@nongnu.org; Thu, 19 Jan 2017 12:12:49 -0500 Received: from mail-wm0-x22e.google.com ([2a00:1450:400c:c09::22e]:37106) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1cUGGW-0001hd-Bd for qemu-devel@nongnu.org; Thu, 19 Jan 2017 12:12:48 -0500 Received: by mail-wm0-x22e.google.com with SMTP id c206so3177010wme.0 for ; Thu, 19 Jan 2017 09:12:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=y4j9G5Sla3CgLxRziQBv4D1BM3K05a69DkduVlQG/Lw=; b=RHd7jIqvaRfNBdoJnWMypHekgX0PSPOi+ghnf9Piybsuy/of9AeqGL0xehz3474qPd bcp1q6r1rB5LNAfcyqtaqagvvHF8saCmTFaPZMr7pjunJZPoabu3cVRuW0mXQhlskNoO IXp8IWUuOYNOKyM/XbCqKUptGZIx/VnCqI2fc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=y4j9G5Sla3CgLxRziQBv4D1BM3K05a69DkduVlQG/Lw=; b=GLp2qbbPE0Ho4efNoEfT5+8ZXywhC1sZyQj0O9g61rOa4k1K8SxN0wdQmkMEG6qSRG SLDZKn5IyYtClNGGxFm5qf9GWlBRTzI7ATNH+9vINa4NjxAJzN56N7spKS+PtpsxGZAU LEiSJCt556OW76rkDxp+zsxb/ZT183SWR9RIgPlw5iAjvraBd/S+okCkgm0bLBtUJ5zU u0kYBh4droQjN/6dyCzOyk5SbbSxtteFDZUldVIJUAKOgPJu5WEdmvRNSSVJrJrIOHkn jxt886UxQKEa9c1UIKaL1UjKY+i8lYF0F1XKmcMzpG6u/CIXhYYKG8t4twO+8Qzzz83G 1rhg== X-Gm-Message-State: AIkVDXIOI2AbC/klxarYS2lHzZ5H0p3PVHO8VaHEC0u7iOjSgE162mcduVnkz1N3iGPmMgZd X-Received: by 10.28.220.135 with SMTP id t129mr28673252wmg.38.1484845967338; Thu, 19 Jan 2017 09:12:47 -0800 (PST) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id u81sm14120821wmu.10.2017.01.19.09.12.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Jan 2017 09:12:46 -0800 (PST) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 6FDF23E2A41; Thu, 19 Jan 2017 17:05:09 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: mttcg@listserver.greensocs.com, qemu-devel@nongnu.org, fred.konrad@greensocs.com, a.rigo@virtualopensystems.com, cota@braap.org, bobby.prani@gmail.com, nikunj@linux.vnet.ibm.com Date: Thu, 19 Jan 2017 17:05:03 +0000 Message-Id: <20170119170507.16185-24-alex.bennee@linaro.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170119170507.16185-1-alex.bennee@linaro.org> References: <20170119170507.16185-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::22e Subject: [Qemu-devel] [PATCH v7 23/27] target-arm/cpu.h: make ARM_CP defined consistent X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, claudio.fontana@huawei.com, jan.kiszka@siemens.com, mark.burton@greensocs.com, "open list:ARM" , serge.fdrv@gmail.com, pbonzini@redhat.com, =?utf-8?q?Alex_Benn=C3=A9e?= , bamvor.zhangjian@linaro.org, rth@twiddle.net Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This is a purely mechanical change to make the ARM_CP flags neatly align and use a consistent format so it is easier to see which bit each flag is. Signed-off-by: Alex Bennée --- target/arm/cpu.h | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) -- 2.11.0 diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 7bd16eec18..366b619b8a 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1389,20 +1389,20 @@ static inline uint64_t cpreg_to_kvm_id(uint32_t cpregid) * need to be surrounded by gen_io_start()/gen_io_end(). In particular, * registers which implement clocks or timers require this. */ -#define ARM_CP_SPECIAL 1 -#define ARM_CP_CONST 2 -#define ARM_CP_64BIT 4 -#define ARM_CP_SUPPRESS_TB_END 8 -#define ARM_CP_OVERRIDE 16 -#define ARM_CP_ALIAS 32 -#define ARM_CP_IO 64 -#define ARM_CP_NO_RAW 128 -#define ARM_CP_NOP (ARM_CP_SPECIAL | (1 << 8)) -#define ARM_CP_WFI (ARM_CP_SPECIAL | (2 << 8)) -#define ARM_CP_NZCV (ARM_CP_SPECIAL | (3 << 8)) -#define ARM_CP_CURRENTEL (ARM_CP_SPECIAL | (4 << 8)) -#define ARM_CP_DC_ZVA (ARM_CP_SPECIAL | (5 << 8)) -#define ARM_LAST_SPECIAL ARM_CP_DC_ZVA +#define ARM_CP_SPECIAL (1 << 0) +#define ARM_CP_CONST (1 << 1) +#define ARM_CP_64BIT (1 << 2) +#define ARM_CP_SUPPRESS_TB_END (1 << 3) +#define ARM_CP_OVERRIDE (1 << 4) +#define ARM_CP_ALIAS (1 << 5) +#define ARM_CP_IO (1 << 6) +#define ARM_CP_NO_RAW (1 << 7) +#define ARM_CP_NOP (ARM_CP_SPECIAL | (1 << 8)) +#define ARM_CP_WFI (ARM_CP_SPECIAL | (2 << 8)) +#define ARM_CP_NZCV (ARM_CP_SPECIAL | (3 << 8)) +#define ARM_CP_CURRENTEL (ARM_CP_SPECIAL | (4 << 8)) +#define ARM_CP_DC_ZVA (ARM_CP_SPECIAL | (5 << 8)) +#define ARM_LAST_SPECIAL ARM_CP_DC_ZVA /* Used only as a terminator for ARMCPRegInfo lists */ #define ARM_CP_SENTINEL 0xffff /* Mask of only the flag bits in a type field */