From patchwork Thu Dec 8 17:50:24 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 87324 Delivered-To: patch@linaro.org Received: by 10.140.20.101 with SMTP id 92csp973394qgi; Thu, 8 Dec 2016 09:58:12 -0800 (PST) X-Received: by 10.237.54.193 with SMTP id f59mr45968806qtb.14.1481219892280; Thu, 08 Dec 2016 09:58:12 -0800 (PST) Return-Path: Received: from lists.gnu.org (lists.gnu.org. [208.118.235.17]) by mx.google.com with ESMTPS id p86si17892019qki.104.2016.12.08.09.58.12 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 08 Dec 2016 09:58:12 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Received: from localhost ([::1]:48043 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cF2xP-00085d-N7 for patch@linaro.org; Thu, 08 Dec 2016 12:58:11 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59821) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cF2qM-0003Pq-DV for qemu-devel@nongnu.org; Thu, 08 Dec 2016 12:50:55 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cF2qL-0004Cq-IT for qemu-devel@nongnu.org; Thu, 08 Dec 2016 12:50:54 -0500 Received: from mx1.redhat.com ([209.132.183.28]:50672) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cF2qE-00048s-Cx; Thu, 08 Dec 2016 12:50:46 -0500 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 6C62161BAB; Thu, 8 Dec 2016 17:50:45 +0000 (UTC) Received: from kamzik.brq.redhat.com (kamzik.brq.redhat.com [10.34.1.143]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id uB8HoWn5022068; Thu, 8 Dec 2016 12:50:43 -0500 From: Andrew Jones To: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, qemu-devel@nongnu.org, qemu-arm@nongnu.org Date: Thu, 8 Dec 2016 18:50:24 +0100 Message-Id: <20161208175030.12269-5-drjones@redhat.com> In-Reply-To: <20161208175030.12269-1-drjones@redhat.com> References: <20161208175030.12269-1-drjones@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Thu, 08 Dec 2016 17:50:45 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH kvm-unit-tests v8 04/10] arm/arm64: irq enable/disable X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, marc.zyngier@arm.com, andre.przywara@arm.com, eric.auger@redhat.com, pbonzini@redhat.com, alex.bennee@linaro.org, christoffer.dall@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Reviewed-by: Alex Bennée Reviewed-by: Eric Auger Signed-off-by: Andrew Jones --- lib/arm/asm/processor.h | 10 ++++++++++ lib/arm64/asm/processor.h | 10 ++++++++++ 2 files changed, 20 insertions(+) -- 2.9.3 diff --git a/lib/arm/asm/processor.h b/lib/arm/asm/processor.h index 857bdd96a3cc..6dc1472468dd 100644 --- a/lib/arm/asm/processor.h +++ b/lib/arm/asm/processor.h @@ -35,6 +35,16 @@ static inline unsigned long current_cpsr(void) #define current_mode() (current_cpsr() & MODE_MASK) +static inline void local_irq_enable(void) +{ + asm volatile("cpsie i" : : : "memory", "cc"); +} + +static inline void local_irq_disable(void) +{ + asm volatile("cpsid i" : : : "memory", "cc"); +} + #define MPIDR __ACCESS_CP15(c0, 0, c0, 5) static inline unsigned int get_mpidr(void) { diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h index 0898d89f9761..f42f15c79d43 100644 --- a/lib/arm64/asm/processor.h +++ b/lib/arm64/asm/processor.h @@ -68,6 +68,16 @@ static inline unsigned long current_level(void) return el & 0xc; } +static inline void local_irq_enable(void) +{ + asm volatile("msr daifclr, #2" : : : "memory"); +} + +static inline void local_irq_disable(void) +{ + asm volatile("msr daifset, #2" : : : "memory"); +} + static inline unsigned int get_mpidr(void) { return read_sysreg(mpidr_el1);