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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id o68si2889903ywe.389.2016.10.27.08.26.31 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 27 Oct 2016 08:26:31 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:42281 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bzmZa-0008I5-U6 for patch@linaro.org; Thu, 27 Oct 2016 11:26:30 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42522) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bzmKl-0004ca-An for qemu-devel@nongnu.org; Thu, 27 Oct 2016 11:11:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bzmKh-0007dx-C2 for qemu-devel@nongnu.org; Thu, 27 Oct 2016 11:11:11 -0400 Received: from mail-wm0-x232.google.com ([2a00:1450:400c:c09::232]:38555) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1bzmKh-0007dY-4n for qemu-devel@nongnu.org; Thu, 27 Oct 2016 11:11:07 -0400 Received: by mail-wm0-x232.google.com with SMTP id n67so50396188wme.1 for ; Thu, 27 Oct 2016 08:11:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9+Jd4AS5jDpB92feHDMsjtakS9m6ZqhT3wC9kUWtN94=; b=Bf9aZXwsHcWpyKkTWTEKMnHx6i9AK/C5FH2Th1w1L6rCfjuAWsXDI7xoIOHTiGTRZx Bji8F56XlvwWH53gPJgeuV0y+a+JO1vjKB5tv0CUFXHhKsWCpdd/1/0bTy/QMMbdkmhv R5X+olshTiQwU4wHNWCs4hhp+FaxL2dDWIO/0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9+Jd4AS5jDpB92feHDMsjtakS9m6ZqhT3wC9kUWtN94=; b=bwxD8ev6ow1dbm8oZz60VfzO/RDowVI7tDi1fuKjbm5wp9d9lGo9j82OZRlhHXuFAs XT3wmdmsudLGAyMl3y+kQa/hNEkbKefjylX/gW8EgMUUsSNr+1fZ1DR4S+ljKQDd9Q0a gAqHR1Cu+N2Z+o96YbgcgvAoo9DSaAIg8FFdWu/8KbNib29ZgPoTv8M4uqIDXEBgTcWJ ka8tkinf2Zl4V2CuPkprOkfq0g1g6jPI7ycANySWNGantiLjnD52VHmGy+OrKF1Nz4jy YlxVE+vZU31Ip44J/AUDROfvt1GH58iHpA+IxgF2lorp0LrKZxwlow4gw7OsUk4SeGoH QdLw== X-Gm-Message-State: ABUngvcv/clvIBOStAXK3de+32hD6VwOyOPbdCiqur6erOu+IaAyfkxggAOp64ziC21s6vUw X-Received: by 10.28.198.11 with SMTP id w11mr7984291wmf.8.1477581066075; Thu, 27 Oct 2016 08:11:06 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id wh3sm8944816wjb.49.2016.10.27.08.11.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 27 Oct 2016 08:11:04 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id AA0BB3E02DF; Thu, 27 Oct 2016 16:10:59 +0100 (BST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: pbonzini@redhat.com Date: Thu, 27 Oct 2016 16:10:05 +0100 Message-Id: <20161027151030.20863-9-alex.bennee@linaro.org> X-Mailer: git-send-email 2.10.1 In-Reply-To: <20161027151030.20863-1-alex.bennee@linaro.org> References: <20161027151030.20863-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::232 Subject: [Qemu-devel] [PATCH v5 08/33] translate-all: Add assert_(memory|tb)_lock annotations X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mttcg@listserver.greensocs.com, peter.maydell@linaro.org, claudio.fontana@huawei.com, nikunj@linux.vnet.ibm.com, Peter Crosthwaite , jan.kiszka@siemens.com, mark.burton@greensocs.com, a.rigo@virtualopensystems.com, qemu-devel@nongnu.org, cota@braap.org, serge.fdrv@gmail.com, bobby.prani@gmail.com, rth@twiddle.net, =?UTF-8?q?Alex=20Benn=C3=A9e?= , fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This adds calls to the assert_(memory|tb)_lock for all public APIs which are documented as needing them held for linux-user mode. The asserts are NOPs for system-mode although these will be converted when MTTCG is enabled. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- v4 - mention tb_locks as well - tweak commit message --- translate-all.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) -- 2.10.1 diff --git a/translate-all.c b/translate-all.c index f6da7bd..5460cf2 100644 --- a/translate-all.c +++ b/translate-all.c @@ -452,6 +452,10 @@ static PageDesc *page_find_alloc(tb_page_addr_t index, int alloc) void **lp; int i; + if (alloc) { + assert_memory_lock(); + } + /* Level 1. Always allocated. */ lp = l1_map + ((index >> V_L1_SHIFT) & (V_L1_SIZE - 1)); @@ -818,6 +822,8 @@ static TranslationBlock *tb_alloc(target_ulong pc) { TranslationBlock *tb; + assert_tb_lock(); + if (tcg_ctx.tb_ctx.nb_tbs >= tcg_ctx.code_gen_max_blocks) { return NULL; } @@ -831,6 +837,8 @@ static TranslationBlock *tb_alloc(target_ulong pc) /* Called with tb_lock held. */ void tb_free(TranslationBlock *tb) { + assert_tb_lock(); + /* In practice this is mostly used for single use temporary TB Ignore the hard cases and just back up if this TB happens to be the last one generated. */ @@ -1072,6 +1080,8 @@ void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr) uint32_t h; tb_page_addr_t phys_pc; + assert_tb_lock(); + atomic_set(&tb->invalid, true); /* remove the TB from the hash list */ @@ -1129,7 +1139,7 @@ static void build_page_bitmap(PageDesc *p) tb_end = tb_start + tb->size; if (tb_end > TARGET_PAGE_SIZE) { tb_end = TARGET_PAGE_SIZE; - } + } } else { tb_start = 0; tb_end = ((tb->pc + tb->size) & ~TARGET_PAGE_MASK); @@ -1152,6 +1162,8 @@ static inline void tb_alloc_page(TranslationBlock *tb, bool page_already_protected; #endif + assert_memory_lock(); + tb->page_addr[n] = page_addr; p = page_find_alloc(page_addr >> TARGET_PAGE_BITS, 1); tb->page_next[n] = p->first_tb; @@ -1208,6 +1220,8 @@ static void tb_link_page(TranslationBlock *tb, tb_page_addr_t phys_pc, { uint32_t h; + assert_memory_lock(); + /* add in the page list */ tb_alloc_page(tb, 0, phys_pc & TARGET_PAGE_MASK); if (phys_page2 != -1) { @@ -1239,6 +1253,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu, #ifdef CONFIG_PROFILER int64_t ti; #endif + assert_memory_lock(); phys_pc = get_page_addr_code(env, pc); if (use_icount && !(cflags & CF_IGNORE_ICOUNT)) { @@ -1367,6 +1382,8 @@ TranslationBlock *tb_gen_code(CPUState *cpu, */ void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end) { + assert_memory_lock(); + while (start < end) { tb_invalidate_phys_page_range(start, end, 0); start &= TARGET_PAGE_MASK; @@ -1403,6 +1420,8 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end, uint32_t current_flags = 0; #endif /* TARGET_HAS_PRECISE_SMC */ + assert_memory_lock(); + p = page_find(start >> TARGET_PAGE_BITS); if (!p) { return; @@ -2010,6 +2029,7 @@ void page_set_flags(target_ulong start, target_ulong end, int flags) assert(end < ((target_ulong)1 << L1_MAP_ADDR_SPACE_BITS)); #endif assert(start < end); + assert_memory_lock(); start = start & TARGET_PAGE_MASK; end = TARGET_PAGE_ALIGN(end);