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[147.11.146.144]) by smtp.gmail.com with ESMTPSA id 16sm9836332pfi.161.2020.08.14.09.41.36 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 14 Aug 2020 09:41:38 -0700 (PDT) From: Bin Meng To: Alistair Francis , Bastian Koppelmann , Palmer Dabbelt , Sagar Karandikar , qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [PATCH 09/18] hw/sd: sdhci: Make sdhci_poweron_reset() internal visible Date: Sat, 15 Aug 2020 00:40:47 +0800 Message-Id: <1597423256-14847-10-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1597423256-14847-1-git-send-email-bmeng.cn@gmail.com> References: <1597423256-14847-1-git-send-email-bmeng.cn@gmail.com> Received-SPF: pass client-ip=2607:f8b0:4864:20::541; envelope-from=bmeng.cn@gmail.com; helo=mail-pg1-x541.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bin Meng , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , qemu-block@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Bin Meng sdhci_poweron_reset() might be needed for any SDHCI compatible device that is built on top of the generic SDHCI device. Signed-off-by: Bin Meng --- hw/sd/sdhci-internal.h | 1 + hw/sd/sdhci.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h index e8c753d..b587e8e 100644 --- a/hw/sd/sdhci-internal.h +++ b/hw/sd/sdhci-internal.h @@ -342,5 +342,6 @@ void sdhci_uninitfn(SDHCIState *s); void sdhci_common_realize(SDHCIState *s, Error **errp); void sdhci_common_unrealize(SDHCIState *s); void sdhci_common_class_init(ObjectClass *klass, void *data); +void sdhci_poweron_reset(DeviceState *dev); #endif diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index deac181..20f2fe0 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -294,7 +294,7 @@ static void sdhci_reset(SDHCIState *s) s->pending_insert_state = false; } -static void sdhci_poweron_reset(DeviceState *dev) +void sdhci_poweron_reset(DeviceState *dev) { /* QOM (ie power-on) reset. This is identical to reset * commanded via device register apart from handling of the