From patchwork Fri Jul 1 13:02:08 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 71307 Delivered-To: patch@linaro.org Received: by 10.140.28.4 with SMTP id 4csp294586qgy; Fri, 1 Jul 2016 06:06:48 -0700 (PDT) X-Received: by 10.55.93.134 with SMTP id r128mr25316092qkb.16.1467378408875; Fri, 01 Jul 2016 06:06:48 -0700 (PDT) Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id u53si209934qte.85.2016.07.01.06.06.48 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 01 Jul 2016 06:06:48 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Received: from localhost ([::1]:33484 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bIy9g-00027o-C1 for patch@linaro.org; Fri, 01 Jul 2016 09:06:48 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50280) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bIy5T-0006oG-HG for qemu-devel@nongnu.org; Fri, 01 Jul 2016 09:02:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bIy5O-00050O-KK for qemu-devel@nongnu.org; Fri, 01 Jul 2016 09:02:26 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43785) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bIy5J-0004x1-2E; Fri, 01 Jul 2016 09:02:17 -0400 Received: from int-mx14.intmail.prod.int.phx2.redhat.com (int-mx14.intmail.prod.int.phx2.redhat.com [10.5.11.27]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 8DE91C0624B0; Fri, 1 Jul 2016 13:02:16 +0000 (UTC) Received: from hawk.localdomain.com (dhcp-1-139.brq.redhat.com [10.34.1.139]) by int-mx14.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u61D2DDC023420; Fri, 1 Jul 2016 09:02:15 -0400 From: Andrew Jones To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Date: Fri, 1 Jul 2016 15:02:08 +0200 Message-Id: <1467378129-23302-2-git-send-email-drjones@redhat.com> In-Reply-To: <1467378129-23302-1-git-send-email-drjones@redhat.com> References: <1467378129-23302-1-git-send-email-drjones@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.27 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Fri, 01 Jul 2016 13:02:16 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 1/2] gic: provide defines for v2/v3 targetlist sizes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Andrew Jones --- include/hw/intc/arm_gic.h | 3 +++ include/hw/intc/arm_gicv3_common.h | 3 +++ 2 files changed, 6 insertions(+) -- 2.7.4 diff --git a/include/hw/intc/arm_gic.h b/include/hw/intc/arm_gic.h index 0971e37710dd6..42bb535fd4571 100644 --- a/include/hw/intc/arm_gic.h +++ b/include/hw/intc/arm_gic.h @@ -23,6 +23,9 @@ #include "arm_gic_common.h" +/* Number of SGI target-list bits */ +#define GIC_TARGETLIST_BITS 8 + #define TYPE_ARM_GIC "arm_gic" #define ARM_GIC(obj) \ OBJECT_CHECK(GICState, (obj), TYPE_ARM_GIC) diff --git a/include/hw/intc/arm_gicv3_common.h b/include/hw/intc/arm_gicv3_common.h index f72e49922feb1..341a3118f0f44 100644 --- a/include/hw/intc/arm_gicv3_common.h +++ b/include/hw/intc/arm_gicv3_common.h @@ -35,6 +35,9 @@ #define GICV3_MAXIRQ 1020 #define GICV3_MAXSPI (GICV3_MAXIRQ - GIC_INTERNAL) +/* Number of SGI target-list bits */ +#define GICV3_TARGETLIST_BITS 16 + /* Minimum BPR for Secure, or when security not enabled */ #define GIC_MIN_BPR 0 /* Minimum BPR for Nonsecure when security is enabled */