From patchwork Tue Jun 28 17:14:50 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 71139 Delivered-To: patch@linaro.org Received: by 10.140.28.4 with SMTP id 4csp1710345qgy; Tue, 28 Jun 2016 10:17:29 -0700 (PDT) X-Received: by 10.55.38.9 with SMTP id y9mr3611010qkg.156.1467134246763; Tue, 28 Jun 2016 10:17:26 -0700 (PDT) Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id f18si4615478qkh.171.2016.06.28.10.17.26 for (version=TLS1 cipher=AES128-SHA bits=128/128); Tue, 28 Jun 2016 10:17:26 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:38344 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHwda-0003Iy-0m for patch@linaro.org; Tue, 28 Jun 2016 13:17:26 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53322) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHwbC-0001Dm-Sc for qemu-devel@nongnu.org; Tue, 28 Jun 2016 13:14:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bHwb9-00062X-Ko for qemu-devel@nongnu.org; Tue, 28 Jun 2016 13:14:58 -0400 Received: from mail-wm0-x22d.google.com ([2a00:1450:400c:c09::22d]:33546) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bHwb9-00062Q-57 for qemu-devel@nongnu.org; Tue, 28 Jun 2016 13:14:55 -0400 Received: by mail-wm0-x22d.google.com with SMTP id r190so28551951wmr.0 for ; Tue, 28 Jun 2016 10:14:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=bC277Je2pIR9OiLWKx0ha3zJz3Bu6lfdKNyZVJvf9cw=; b=KeTrYfpq5jmmiAZtuiirBatnmVAaY6HGSmKWPFATvJR/P7aOCfo2KhtG/3GmxCLb/q A+NF3KlUGTM++Hx+8FWjONm5ue6Q3YOeXsdBzjekTIAekGs3E7HJgwuMHmO5i+1jesg6 9Dww4M7lHCbMPCZMlMedpFL1XBlukuIaR+BLk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=bC277Je2pIR9OiLWKx0ha3zJz3Bu6lfdKNyZVJvf9cw=; b=J90jnZPx3CL4lLS8KJmKzfTtm5vpClMUVMeN6GLVbOmvE7v/dm7YC2qEspUYqtjYQd aw5RRnqp2vVZGSSJAfucg310UwO8lNWX0c+SKz1HqwOtgXWEKxS5bnmnp7Ylw7KprCVa EZnFhT8qUaRWMZBQWurn9aGfE5zvWv9N/9wNTsqXAdJOrni/IXXYLE7ux14QMkyLuFBx uBhS4iqyzZX8PrVesP7/slPcN/ZfoVb7ERGEoViWeAd7Pi66RO8ezrN1GNXyS8YtOFDt 3ltDWWtkzOjeAOdvnO9vxvqvrikyuxT9WgGfPPJClPQglGMAhPvECzCj7ygVVcdH95O5 q1zw== X-Gm-Message-State: ALyK8tLD710SdsrwUTVFFus2X7bJrs4dLw9akuGFfCGLQ982osjW5nQidGWulIUQj6wTTXBX X-Received: by 10.194.173.230 with SMTP id bn6mr4017255wjc.8.1467134093681; Tue, 28 Jun 2016 10:14:53 -0700 (PDT) Received: from localhost.localdomain ([188.203.148.129]) by smtp.gmail.com with ESMTPSA id m125sm17991346wmm.8.2016.06.28.10.14.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 28 Jun 2016 10:14:52 -0700 (PDT) From: Ard Biesheuvel To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Tue, 28 Jun 2016 19:14:50 +0200 Message-Id: <1467134090-5099-1-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::22d Subject: [Qemu-devel] [PATCH] hw/arm/virt: mark the PCIe host controller as DMA coherent in the DT X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ard Biesheuvel , crosthwaite.peter@gmail.com, eric.auger@linaro.org, agraf@suse.de, bogdan.purcareata@nxp.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Since QEMU performs cacheable accesses to guest memory when doing DMA as part of the implementation of emulated PCI devices, guest drivers should use cacheable accesses as well when running under KVM. Since this essentially means that emulated PCI devices are DMA coherent, set the 'dma-coherent' DT property on the PCIe host controller DT node. Signed-off-by: Ard Biesheuvel --- hw/arm/virt.c | 1 + 1 file changed, 1 insertion(+) -- 2.7.4 diff --git a/hw/arm/virt.c b/hw/arm/virt.c index c5c125e9204a..6e098afd1fe5 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1021,6 +1021,7 @@ static void create_pcie(const VirtBoardInfo *vbi, qemu_irq *pic, qemu_fdt_setprop_cell(vbi->fdt, nodename, "#size-cells", 2); qemu_fdt_setprop_cells(vbi->fdt, nodename, "bus-range", 0, nr_pcie_buses - 1); + qemu_fdt_setprop(vbi->fdt, nodename, "dma-coherent", NULL, 0); if (vbi->v2m_phandle) { qemu_fdt_setprop_cells(vbi->fdt, nodename, "msi-parent",