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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id d26si12992007qtb.58.2016.06.13.10.13.43 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 13 Jun 2016 10:13:43 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Received: from localhost ([::1]:57930 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bCVQl-0008Of-6V for patch@linaro.org; Mon, 13 Jun 2016 13:13:43 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39015) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bCVJ3-0001P6-PW for qemu-devel@nongnu.org; Mon, 13 Jun 2016 13:05:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bCVJ2-0001pA-8u for qemu-devel@nongnu.org; Mon, 13 Jun 2016 13:05:45 -0400 Received: from mx1.redhat.com ([209.132.183.28]:35625) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bCVJ2-0001ov-0B for qemu-devel@nongnu.org; Mon, 13 Jun 2016 13:05:44 -0400 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 9DC4646269; Mon, 13 Jun 2016 17:05:43 +0000 (UTC) Received: from localhost (ovpn-112-61.ams2.redhat.com [10.36.112.61]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u5DH5g93012187; Mon, 13 Jun 2016 13:05:43 -0400 From: Stefan Hajnoczi To: qemu-devel@nongnu.org Date: Mon, 13 Jun 2016 18:05:23 +0100 Message-Id: <1465837535-30067-4-git-send-email-stefanha@redhat.com> In-Reply-To: <1465837535-30067-1-git-send-email-stefanha@redhat.com> References: <1465837535-30067-1-git-send-email-stefanha@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.26 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Mon, 13 Jun 2016 17:05:43 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 03/15] cpu-exec: Rename cpu_resume_from_signal() to cpu_loop_exit_noexc() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , Peter Maydell , Fam Zheng , Jeff Cody , mreitz@redhat.com, jjherne@linux.vnet.ibm.com, Paolo Bonzini Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell The function cpu_resume_from_signal() is now always called with a NULL puc argument, and is rather misnamed since it is never called from a signal handler. It is essentially forcing an exit to the top level cpu loop but without raising any exception, so rename it to cpu_loop_exit_noexc() and drop the useless unused argument. Signed-off-by: Peter Maydell Reviewed-by: Sergey Fedorov Acked-by: Eduardo Habkost Acked-by: Riku Voipio Message-id: 1463494687-25947-4-git-send-email-peter.maydell@linaro.org --- cpu-exec-common.c | 6 ++---- exec.c | 2 +- hw/i386/kvmvapic.c | 2 +- include/exec/exec-all.h | 2 +- target-i386/bpt_helper.c | 2 +- target-lm32/helper.c | 2 +- target-s390x/helper.c | 2 +- target-xtensa/helper.c | 2 +- translate-all.c | 4 ++-- user-exec.c | 2 +- 10 files changed, 12 insertions(+), 14 deletions(-) -- 2.5.5 diff --git a/cpu-exec-common.c b/cpu-exec-common.c index 0cb5b63..0cb4ae6 100644 --- a/cpu-exec-common.c +++ b/cpu-exec-common.c @@ -26,10 +26,8 @@ bool exit_request; CPUState *tcg_current_cpu; -/* exit the current TB from a signal handler. The host registers are - restored in a state compatible with the CPU emulator - */ -void cpu_resume_from_signal(CPUState *cpu, void *puc) +/* exit the current TB, but without causing any exception to be raised */ +void cpu_loop_exit_noexc(CPUState *cpu) { /* XXX: restore cpu registers saved in host registers */ diff --git a/exec.c b/exec.c index f2c9e37..a9d465b 100644 --- a/exec.c +++ b/exec.c @@ -2091,7 +2091,7 @@ static void check_watchpoint(int offset, int len, MemTxAttrs attrs, int flags) } else { cpu_get_tb_cpu_state(env, &pc, &cs_base, &cpu_flags); tb_gen_code(cpu, pc, cs_base, cpu_flags, 1); - cpu_resume_from_signal(cpu, NULL); + cpu_loop_exit_noexc(cpu); } } } else { diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c index 5b71b1b..3bf1ddd 100644 --- a/hw/i386/kvmvapic.c +++ b/hw/i386/kvmvapic.c @@ -450,7 +450,7 @@ static void patch_instruction(VAPICROMState *s, X86CPU *cpu, target_ulong ip) if (!kvm_enabled()) { tb_gen_code(cs, current_pc, current_cs_base, current_flags, 1); - cpu_resume_from_signal(cs, NULL); + cpu_loop_exit_noexc(cs); } } diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index b6a4a12..e076397 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -50,7 +50,7 @@ void restore_state_to_opc(CPUArchState *env, struct TranslationBlock *tb, void cpu_gen_init(void); bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc); -void QEMU_NORETURN cpu_resume_from_signal(CPUState *cpu, void *puc); +void QEMU_NORETURN cpu_loop_exit_noexc(CPUState *cpu); void QEMU_NORETURN cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); TranslationBlock *tb_gen_code(CPUState *cpu, target_ulong pc, target_ulong cs_base, diff --git a/target-i386/bpt_helper.c b/target-i386/bpt_helper.c index 499a277..6fd7fe0 100644 --- a/target-i386/bpt_helper.c +++ b/target-i386/bpt_helper.c @@ -218,7 +218,7 @@ void breakpoint_handler(CPUState *cs) if (check_hw_breakpoints(env, false)) { raise_exception(env, EXCP01_DB); } else { - cpu_resume_from_signal(cs, NULL); + cpu_loop_exit_noexc(cs); } } } else { diff --git a/target-lm32/helper.c b/target-lm32/helper.c index b8f4ed9..891da18 100644 --- a/target-lm32/helper.c +++ b/target-lm32/helper.c @@ -141,7 +141,7 @@ void lm32_debug_excp_handler(CPUState *cs) if (check_watchpoints(env)) { raise_exception(env, EXCP_WATCHPOINT); } else { - cpu_resume_from_signal(cs, NULL); + cpu_loop_exit_noexc(cs); } } } else { diff --git a/target-s390x/helper.c b/target-s390x/helper.c index ad8f797..9a744df 100644 --- a/target-s390x/helper.c +++ b/target-s390x/helper.c @@ -688,7 +688,7 @@ void s390x_cpu_debug_excp_handler(CPUState *cs) will be triggered, it will call load_psw which will recompute the watchpoints. */ cpu_watchpoint_remove_all(cs, BP_CPU); - cpu_resume_from_signal(cs, NULL); + cpu_loop_exit_noexc(cs); } } #endif /* CONFIG_USER_ONLY */ diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c index 839f4a7..768b32c 100644 --- a/target-xtensa/helper.c +++ b/target-xtensa/helper.c @@ -108,7 +108,7 @@ void xtensa_breakpoint_handler(CPUState *cs) if (cause) { debug_exception_env(env, cause); } - cpu_resume_from_signal(cs, NULL); + cpu_loop_exit_noexc(cs); } } } diff --git a/translate-all.c b/translate-all.c index ff588f3..118e7d3 100644 --- a/translate-all.c +++ b/translate-all.c @@ -1395,7 +1395,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end, modifying the memory. It will ensure that it cannot modify itself */ tb_gen_code(cpu, current_pc, current_cs_base, current_flags, 1); - cpu_resume_from_signal(cpu, NULL); + cpu_loop_exit_noexc(cpu); } #endif } @@ -1654,7 +1654,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr) repeating the fault, which is horribly inefficient. Better would be to execute just this insn uncached, or generate a second new TB. */ - cpu_resume_from_signal(cpu, NULL); + cpu_loop_exit_noexc(cpu); } void tb_flush_jmp_cache(CPUState *cpu, target_ulong addr) diff --git a/user-exec.c b/user-exec.c index efd34a6..c5179a4 100644 --- a/user-exec.c +++ b/user-exec.c @@ -74,7 +74,7 @@ static void cpu_exit_tb_from_sighandler(CPUState *cpu, void *puc) sigprocmask(SIG_SETMASK, &uc->sc_mask, NULL); #endif - cpu_resume_from_signal(cpu, NULL); + cpu_loop_exit_noexc(cpu); } /* 'pc' is the host PC at which the exception was raised. 'address' is