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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id s124si15739943qhe.99.2016.06.13.10.14.37 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 13 Jun 2016 10:14:37 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Received: from localhost ([::1]:57936 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bCVRd-00018s-0M for patch@linaro.org; Mon, 13 Jun 2016 13:14:37 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38989) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bCVJ2-0001Nn-Rs for qemu-devel@nongnu.org; Mon, 13 Jun 2016 13:05:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bCVIx-0001o9-V2 for qemu-devel@nongnu.org; Mon, 13 Jun 2016 13:05:44 -0400 Received: from mx1.redhat.com ([209.132.183.28]:52010) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bCVIx-0001o0-GP for qemu-devel@nongnu.org; Mon, 13 Jun 2016 13:05:39 -0400 Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 09C4A7F6A7; Mon, 13 Jun 2016 17:05:39 +0000 (UTC) Received: from localhost (ovpn-112-61.ams2.redhat.com [10.36.112.61]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u5DH5bFu012151; Mon, 13 Jun 2016 13:05:38 -0400 From: Stefan Hajnoczi To: qemu-devel@nongnu.org Date: Mon, 13 Jun 2016 18:05:21 +0100 Message-Id: <1465837535-30067-2-git-send-email-stefanha@redhat.com> In-Reply-To: <1465837535-30067-1-git-send-email-stefanha@redhat.com> References: <1465837535-30067-1-git-send-email-stefanha@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.26 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Mon, 13 Jun 2016 17:05:39 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 01/15] translate-all.c: Don't pass puc, locked to tb_invalidate_phys_page() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , Peter Maydell , Fam Zheng , Jeff Cody , mreitz@redhat.com, jjherne@linux.vnet.ibm.com, Paolo Bonzini Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Peter Maydell The user-mode-only function tb_invalidate_phys_page() is only called from two places: * page_unprotect(), which passes in a non-zero pc, a puc pointer and the value 'true' for the locked argument * page_set_flags(), which passes in a zero pc, a NULL puc pointer and a 'false' locked argument If the pc is non-zero then we may call cpu_resume_from_signal(), which does a longjmp out of the calling code (and out of the signal handler); this is to cover the case of a target CPU with "precise self-modifying code" (currently only x86) executing a store instruction which modifies code in the same TB as the store itself. Rather than doing the longjump directly here, return a flag to the caller which indicates whether the current TB was modified, and move the longjump to page_unprotect. Signed-off-by: Peter Maydell Reviewed-by: Sergey Fedorov Acked-by: Eduardo Habkost Acked-by: Riku Voipio Message-id: 1463494687-25947-2-git-send-email-peter.maydell@linaro.org --- translate-all.c | 26 +++++++++++++++----------- 1 file changed, 15 insertions(+), 11 deletions(-) -- 2.5.5 diff --git a/translate-all.c b/translate-all.c index c599dc4..2285961 100644 --- a/translate-all.c +++ b/translate-all.c @@ -1439,10 +1439,13 @@ void tb_invalidate_phys_page_fast(tb_page_addr_t start, int len) } } #else -/* Called with mmap_lock held. */ -static void tb_invalidate_phys_page(tb_page_addr_t addr, - uintptr_t pc, void *puc, - bool locked) +/* Called with mmap_lock held. If pc is not 0 then it indicates the + * host PC of the faulting store instruction that caused this invalidate. + * Returns true if the caller needs to abort execution of the current + * TB (because it was modified by this store and the guest CPU has + * precise-SMC semantics). + */ +static bool tb_invalidate_phys_page(tb_page_addr_t addr, uintptr_t pc) { TranslationBlock *tb; PageDesc *p; @@ -1460,7 +1463,7 @@ static void tb_invalidate_phys_page(tb_page_addr_t addr, addr &= TARGET_PAGE_MASK; p = page_find(addr >> TARGET_PAGE_BITS); if (!p) { - return; + return false; } tb = p->first_tb; #ifdef TARGET_HAS_PRECISE_SMC @@ -1499,12 +1502,10 @@ static void tb_invalidate_phys_page(tb_page_addr_t addr, modifying the memory. It will ensure that it cannot modify itself */ tb_gen_code(cpu, current_pc, current_cs_base, current_flags, 1); - if (locked) { - mmap_unlock(); - } - cpu_resume_from_signal(cpu, puc); + return true; } #endif + return false; } #endif @@ -1902,7 +1903,7 @@ void page_set_flags(target_ulong start, target_ulong end, int flags) if (!(p->flags & PAGE_WRITE) && (flags & PAGE_WRITE) && p->first_tb) { - tb_invalidate_phys_page(addr, 0, NULL, false); + tb_invalidate_phys_page(addr, 0); } p->flags = flags; } @@ -1996,7 +1997,10 @@ int page_unprotect(target_ulong address, uintptr_t pc, void *puc) /* and since the content will be modified, we must invalidate the corresponding translated code. */ - tb_invalidate_phys_page(addr, pc, puc, true); + if (tb_invalidate_phys_page(addr, pc)) { + mmap_unlock(); + cpu_resume_from_signal(current_cpu, puc); + } #ifdef DEBUG_TB_CHECK tb_invalidate_check(addr); #endif