From patchwork Mon May 16 07:57:22 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 67831 Delivered-To: patch@linaro.org Received: by 10.140.92.199 with SMTP id b65csp1409374qge; Mon, 16 May 2016 01:05:40 -0700 (PDT) X-Received: by 10.140.229.148 with SMTP id z142mr13708630qhb.28.1463385940217; Mon, 16 May 2016 01:05:40 -0700 (PDT) Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id 64si21904455qgy.27.2016.05.16.01.05.40 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 16 May 2016 01:05:40 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Received: from localhost ([::1]:42975 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b2DSp-0001PO-1C for patch@linaro.org; Mon, 16 May 2016 04:01:19 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52734) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b2DPg-0005VZ-AT for qemu-devel@nongnu.org; Mon, 16 May 2016 03:58:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b2DPZ-0000Le-0Q for qemu-devel@nongnu.org; Mon, 16 May 2016 03:58:03 -0400 Received: from mx1.redhat.com ([209.132.183.28]:39532) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b2DPQ-0000K3-V0; Mon, 16 May 2016 03:57:49 -0400 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 6D11A7F370; Mon, 16 May 2016 07:57:48 +0000 (UTC) Received: from hawk.localdomain.com (ovpn-204-50.brq.redhat.com [10.40.204.50]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u4G7vPBM018488; Mon, 16 May 2016 03:57:46 -0400 From: Andrew Jones To: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, qemu-devel@nongnu.org, qemu-arm@nongnu.org, andre.przywara@arm.com, peter.maydell@linaro.org, alex.bennee@linaro.org Date: Mon, 16 May 2016 09:57:22 +0200 Message-Id: <1463385444-12916-9-git-send-email-drjones@redhat.com> In-Reply-To: <1463385444-12916-1-git-send-email-drjones@redhat.com> References: <1463385444-12916-1-git-send-email-drjones@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.24 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Mon, 16 May 2016 07:57:48 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [kvm-unit-tests PATCH 08/10] arm/arm64: gicv2: add an IPI test X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marc.zyngier@arm.com, christoffer.dall@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Andrew Jones --- arm/Makefile.common | 6 +- arm/gic.c | 165 ++++++++++++++++++++++++++++++++++++++++++++++++++++ arm/unittests.cfg | 7 +++ 3 files changed, 175 insertions(+), 3 deletions(-) create mode 100644 arm/gic.c -- 2.4.11 diff --git a/arm/Makefile.common b/arm/Makefile.common index 13a185f7d4473..378fecc910c41 100644 --- a/arm/Makefile.common +++ b/arm/Makefile.common @@ -9,9 +9,9 @@ ifeq ($(LOADADDR),) LOADADDR = 0x40000000 endif -tests-common = \ - $(TEST_DIR)/selftest.flat \ - $(TEST_DIR)/spinlock-test.flat +tests-common = $(TEST_DIR)/selftest.flat +tests-common += $(TEST_DIR)/spinlock-test.flat +tests-common += $(TEST_DIR)/gic.flat all: test_cases diff --git a/arm/gic.c b/arm/gic.c new file mode 100644 index 0000000000000..24be9e0ade369 --- /dev/null +++ b/arm/gic.c @@ -0,0 +1,165 @@ +/* + * GIC tests + * + * GICv2 + * . test sending/receiving IPIs + * + * Copyright (C) 2016, Red Hat Inc, Andrew Jones + * + * This work is licensed under the terms of the GNU LGPL, version 2. + */ +#include +#include +#include +#include +#include +#include +#include + +static int gic_version; +static int acked[NR_CPUS]; +static cpumask_t ready; + +static void nr_cpu_check(int nr) +{ + if (nr_cpus < nr) + report_abort("At least %d cpus required", nr); +} + +static void wait_on_ready(void) +{ + cpumask_set_cpu(smp_processor_id(), &ready); + while (!cpumask_full(&ready)) + cpu_relax(); +} + +static void check_acked(cpumask_t *mask) +{ + int nr_pass, cpu, i; + + /* Wait up to 5s for all interrupts to be delivered */ + for (i = 0; i < 50; ++i) { + mdelay(100); + nr_pass = 0; + for_each_present_cpu(cpu) { + smp_rmb(); + nr_pass += cpumask_test_cpu(cpu, mask) ? + acked[cpu] == 1 : acked[cpu] == 0; + } + if (nr_pass == nr_cpus) { + report("completed in < %d ms", true, ++i * 100); + return; + } + } + report("timed-out (5s timeout)", false); +} + +static void ipi_handler(struct pt_regs *regs __unused) +{ + u32 iar = readl(gicv2_cpu_base() + GIC_CPU_INTACK); + + if (iar != GICC_INT_SPURIOUS) { + writel(iar, gicv2_cpu_base() + GIC_CPU_EOI); + smp_rmb(); + ++acked[smp_processor_id()]; + smp_wmb(); + } +} + +static void ipi_test_self(void) +{ + cpumask_t mask; + + report_prefix_push("self"); + memset(acked, 0, sizeof(acked)); + smp_wmb(); + cpumask_clear(&mask); + cpumask_set_cpu(0, &mask); + writel(2 << 24, gicv2_dist_base() + GIC_DIST_SOFTINT); + check_acked(&mask); + report_prefix_pop(); +} + +static void ipi_test_smp(void) +{ + cpumask_t mask; + unsigned long tlist; + + report_prefix_push("target-list"); + memset(acked, 0, sizeof(acked)); + smp_wmb(); + tlist = cpumask_bits(&cpu_present_mask)[0] & 0xaa; + cpumask_bits(&mask)[0] = tlist; + writel((u8)tlist << 16, gicv2_dist_base() + GIC_DIST_SOFTINT); + check_acked(&mask); + report_prefix_pop(); + + report_prefix_push("broadcast"); + memset(acked, 0, sizeof(acked)); + smp_wmb(); + cpumask_copy(&mask, &cpu_present_mask); + cpumask_clear_cpu(0, &mask); + writel(1 << 24, gicv2_dist_base() + GIC_DIST_SOFTINT); + check_acked(&mask); + report_prefix_pop(); +} + +static void ipi_enable(void) +{ + gicv2_enable_defaults(); +#ifdef __arm__ + install_exception_handler(EXCPTN_IRQ, ipi_handler); +#else + install_irq_handler(EL1H_IRQ, ipi_handler); +#endif + local_irq_enable(); +} + +static void ipi_recv(void) +{ + ipi_enable(); + cpumask_set_cpu(smp_processor_id(), &ready); + while (1) + wfi(); +} + +int main(int argc, char **argv) +{ + char pfx[8]; + int cpu; + + gic_version = gic_init(); + if (!gic_version) + report_abort("No gic present!"); + + snprintf(pfx, 8, "gicv%d", gic_version); + report_prefix_push(pfx); + + if (argc == 0) { + + report_prefix_push("ipi"); + ipi_enable(); + ipi_test_self(); + + } else if (!strcmp(argv[0], "ipi")) { + + report_prefix_push(argv[0]); + nr_cpu_check(2); + ipi_enable(); + + for_each_present_cpu(cpu) { + if (cpu == 0) + continue; + smp_boot_secondary(cpu, ipi_recv); + } + wait_on_ready(); + ipi_test_self(); + ipi_test_smp(); + report_prefix_pop(); + + } else { + report_abort("Unknown subtest '%s'", argv[0]); + } + + return report_summary(); +} diff --git a/arm/unittests.cfg b/arm/unittests.cfg index ffd12e5794aa0..bb364675043f0 100644 --- a/arm/unittests.cfg +++ b/arm/unittests.cfg @@ -51,3 +51,10 @@ file = selftest.flat smp = $MAX_SMP extra_params = -append 'smp' groups = selftest + +# Test GIC emulation +[gicv2-ipi] +file = gic.flat +smp = $((($MAX_SMP < 8)?$MAX_SMP:8)) +extra_params = -machine gic-version=2 -append 'ipi' +groups = gic