From patchwork Mon Mar 21 16:23:06 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 64115 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp1503149lbc; Mon, 21 Mar 2016 09:24:09 -0700 (PDT) X-Received: by 10.55.76.134 with SMTP id z128mr41499818qka.90.1458577449000; Mon, 21 Mar 2016 09:24:09 -0700 (PDT) Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id h204si24585871qhd.117.2016.03.21.09.24.08 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 21 Mar 2016 09:24:08 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dkim=fail header.i=@linaro.org Received: from localhost ([::1]:58847 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ai2ci-0004jF-CW for patch@linaro.org; Mon, 21 Mar 2016 12:24:08 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58716) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ai2bs-0003rk-TX for qemu-devel@nongnu.org; Mon, 21 Mar 2016 12:23:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ai2br-0008Og-Pe for qemu-devel@nongnu.org; Mon, 21 Mar 2016 12:23:16 -0400 Received: from mail-wm0-x22c.google.com ([2a00:1450:400c:c09::22c]:32798) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ai2br-0008Oc-Fc for qemu-devel@nongnu.org; Mon, 21 Mar 2016 12:23:15 -0400 Received: by mail-wm0-x22c.google.com with SMTP id l68so158330611wml.0 for ; Mon, 21 Mar 2016 09:23:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=e8dSHQ77+6+ZJYMzTV1HS8VU+/UO0ciqB4H7nkd0YSo=; b=JmYhBk0tDY6jre834/o1e9Wjj87Z1WS3KuBnseLtk6NUZBp8UmIKFb+imTE2XErQW4 UG8+q9v6EOQzeQ3tzKWJvZ+XQy7tCFo/2iIMJ6SEO5Y9k09WcWqKRvVvcp9nh+5J7sAA oOllft5XKSnMrcVvuPsMwCoHlXwqnRO9zwYLs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=e8dSHQ77+6+ZJYMzTV1HS8VU+/UO0ciqB4H7nkd0YSo=; b=Ap01nMYJ2eE2m+8d3YAxQl4G39wY9+6Pt78DMcXizcDATxE92q9UoinVkWEseaWlAK kzqmCkc+oFyasEC2KBwbHeE0AK0MNntZ1N+26MrH9kShsfsgX6JPGpSlWFm+BR0Qh+Ah 48ym/CHdboKy/FoXvixDUK8k62ashcEwXk3p36kvLuSyV6oH2ro5d3jAVqBBwrJ2J3sj OYTW3tASajhqR/uL3zlraimfwCcX2WSrDPIeBhp/QWbDZVzVUVVT6qGwb2U/Vtn1Gahu XA/px7t3Y69I5MDRt2X2jxAhNBERQgJEcSWf3ByDE44AaoPeZSyiKVv7uYmGEoAf86D6 AR7Q== X-Gm-Message-State: AD7BkJLgrsnBfPYujaaJ2jMcWoMU2xgrqa8d1hO1hSFwMa+Yc3zUDJvztOn5lF6Iv8srHxDB X-Received: by 10.194.185.108 with SMTP id fb12mr32554687wjc.89.1458577394931; Mon, 21 Mar 2016 09:23:14 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id da6sm26103069wjb.24.2016.03.21.09.23.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 21 Mar 2016 09:23:11 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 143A23E02EF; Mon, 21 Mar 2016 16:23:08 +0000 (GMT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Date: Mon, 21 Mar 2016 16:23:06 +0000 Message-Id: <1458577386-9984-3-git-send-email-alex.bennee@linaro.org> X-Mailer: git-send-email 2.7.3 In-Reply-To: <1458577386-9984-1-git-send-email-alex.bennee@linaro.org> References: <1458577386-9984-1-git-send-email-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::22c Cc: pbonzini@redhat.com, sbruno@freebsd.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , peter.maydell@linaro.org Subject: [Qemu-devel] [PATCH v1 2/2] include/qemu/atomic: add compile time asserts X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org To be safely portable no atomic access should be trying to do more than the natural word width of the host. The most common abuse is trying to atomically access 64 bit values on a 32 bit host. This patch adds some QEMU_BUILD_BUG_ON to the __atomic instrinsic paths to create a build failure if (sizeof(*ptr) > sizeof(void *)). Signed-off-by: Alex Bennée --- include/qemu/atomic.h | 58 ++++++++++++++++++++++++++++++--------------------- 1 file changed, 34 insertions(+), 24 deletions(-) -- 2.7.3 diff --git a/include/qemu/atomic.h b/include/qemu/atomic.h index 8f1d8d9..5bc4d6c 100644 --- a/include/qemu/atomic.h +++ b/include/qemu/atomic.h @@ -42,30 +42,34 @@ * loads/stores past the atomic operation load/store. However there is * no explicit memory barrier for the processor. */ -#define atomic_read(ptr) \ - ({ \ - typeof(*ptr) _val; \ - __atomic_load(ptr, &_val, __ATOMIC_RELAXED); \ - _val; \ +#define atomic_read(ptr) \ + ({ \ + QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \ + typeof(*ptr) _val; \ + __atomic_load(ptr, &_val, __ATOMIC_RELAXED); \ + _val; \ }) -#define atomic_set(ptr, i) do { \ - typeof(*ptr) _val = (i); \ - __atomic_store(ptr, &_val, __ATOMIC_RELAXED); \ +#define atomic_set(ptr, i) do { \ + QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \ + typeof(*ptr) _val = (i); \ + __atomic_store(ptr, &_val, __ATOMIC_RELAXED); \ } while(0) /* Atomic RCU operations imply weak memory barriers */ -#define atomic_rcu_read(ptr) \ - ({ \ - typeof(*ptr) _val; \ - __atomic_load(ptr, &_val, __ATOMIC_CONSUME); \ - _val; \ +#define atomic_rcu_read(ptr) \ + ({ \ + QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \ + typeof(*ptr) _val; \ + __atomic_load(ptr, &_val, __ATOMIC_CONSUME); \ + _val; \ }) -#define atomic_rcu_set(ptr, i) do { \ - typeof(*ptr) _val = (i); \ - __atomic_store(ptr, &_val, __ATOMIC_RELEASE); \ +#define atomic_rcu_set(ptr, i) do { \ + QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \ + typeof(*ptr) _val = (i); \ + __atomic_store(ptr, &_val, __ATOMIC_RELEASE); \ } while(0) /* atomic_mb_read/set semantics map Java volatile variables. They are @@ -79,6 +83,7 @@ #if defined(_ARCH_PPC) #define atomic_mb_read(ptr) \ ({ \ + QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \ typeof(*ptr) _val; \ __atomic_load(ptr, &_val, __ATOMIC_RELAXED); \ smp_rmb(); \ @@ -86,22 +91,25 @@ }) #define atomic_mb_set(ptr, i) do { \ + QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \ typeof(*ptr) _val = (i); \ smp_wmb(); \ __atomic_store(ptr, &_val, __ATOMIC_RELAXED); \ smp_mb(); \ } while(0) #else -#define atomic_mb_read(ptr) \ - ({ \ - typeof(*ptr) _val; \ - __atomic_load(ptr, &_val, __ATOMIC_SEQ_CST); \ - _val; \ +#define atomic_mb_read(ptr) \ + ({ \ + QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \ + typeof(*ptr) _val; \ + __atomic_load(ptr, &_val, __ATOMIC_SEQ_CST); \ + _val; \ }) -#define atomic_mb_set(ptr, i) do { \ - typeof(*ptr) _val = (i); \ - __atomic_store(ptr, &_val, __ATOMIC_SEQ_CST); \ +#define atomic_mb_set(ptr, i) do { \ + QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \ + typeof(*ptr) _val = (i); \ + __atomic_store(ptr, &_val, __ATOMIC_SEQ_CST); \ } while(0) #endif @@ -109,6 +117,7 @@ /* All the remaining operations are fully sequentially consistent */ #define atomic_xchg(ptr, i) ({ \ + QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \ typeof(*ptr) _new = (i), _old; \ __atomic_exchange(ptr, &_new, &_old, __ATOMIC_SEQ_CST); \ _old; \ @@ -117,6 +126,7 @@ /* Returns the eventual value, failed or not */ #define atomic_cmpxchg(ptr, old, new) \ ({ \ + QEMU_BUILD_BUG_ON(sizeof(*ptr) > sizeof(void *)); \ typeof(*ptr) _old = (old), _new = (new); \ __atomic_compare_exchange(ptr, &_old, &_new, false, \ __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST); \