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[80.11.198.90]) by smtp.gmail.com with ESMTPSA id t9sm6345866wjf.33.2016.01.27.05.52.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 27 Jan 2016 05:52:04 -0800 (PST) From: Eric Auger To: eric.auger@st.com, eric.auger@linaro.org, qemu-devel@nongnu.org, qemu-arm@nongnu.org, peter.maydell@linaro.org, alex.williamson@redhat.com, pranav.sawargaonkar@gmail.com, p.fedin@samsung.com, pbonzini@redhat.com, agraf@suse.de Date: Wed, 27 Jan 2016 13:51:50 +0000 Message-Id: <1453902715-25304-3-git-send-email-eric.auger@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1453902715-25304-1-git-send-email-eric.auger@linaro.org> References: <1453902715-25304-1-git-send-email-eric.auger@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2a00:1450:400c:c09::236 Cc: Bharat.Bhushan@freescale.com, suravee.suthikulpanit@amd.com, christoffer.dall@linaro.org Subject: [Qemu-devel] [RFC 2/7] Add a function to determine interrupt number for INTx routing X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org This patch adds a PCI bus specific function pointer "route_intx_to_irq" for GPEX. This is used in detemining PCI INTx number from pin. Signed-off-by: Pranavkumar Sawargaonkar Signed-off-by: Tushar Jagad --- hw/pci-host/gpex.c | 12 ++++++++++++ include/hw/pci-host/gpex.h | 1 + 2 files changed, 13 insertions(+) -- 1.9.1 diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c index 9d8fb5a..d0d1250 100644 --- a/hw/pci-host/gpex.c +++ b/hw/pci-host/gpex.c @@ -42,6 +42,17 @@ static void gpex_set_irq(void *opaque, int irq_num, int level) qemu_set_irq(s->irq[irq_num], level); } +static PCIINTxRoute gpex_route_intx_pin_to_irq(void *opaque, int pin) +{ + PCIINTxRoute route; + GPEXHost *s = opaque; + + route.mode = PCI_INTX_ENABLED; + route.irq = (int)s->irq_num[pin]; + + return route; +} + static void gpex_host_realize(DeviceState *dev, Error **errp) { PCIHostState *pci = PCI_HOST_BRIDGE(dev); @@ -66,6 +77,7 @@ static void gpex_host_realize(DeviceState *dev, Error **errp) &s->io_ioport, 0, 4, TYPE_PCIE_BUS); qdev_set_parent_bus(DEVICE(&s->gpex_root), BUS(pci->bus)); + pci_bus_set_route_irq_fn(pci->bus, gpex_route_intx_pin_to_irq); qdev_init_nofail(DEVICE(&s->gpex_root)); } diff --git a/include/hw/pci-host/gpex.h b/include/hw/pci-host/gpex.h index 68c9348..7df1c16 100644 --- a/include/hw/pci-host/gpex.h +++ b/include/hw/pci-host/gpex.h @@ -51,6 +51,7 @@ typedef struct GPEXHost { MemoryRegion io_ioport; MemoryRegion io_mmio; qemu_irq irq[GPEX_NUM_IRQS]; + uint32_t irq_num[GPEX_NUM_IRQS]; } GPEXHost; #endif /* HW_GPEX_H */