From patchwork Fri Dec 11 16:37:11 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 58294 Delivered-To: patches@linaro.org Received: by 10.112.157.166 with SMTP id wn6csp250453lbb; Fri, 11 Dec 2015 08:37:26 -0800 (PST) X-Received: by 10.194.121.35 with SMTP id lh3mr20754773wjb.164.1449851837371; Fri, 11 Dec 2015 08:37:17 -0800 (PST) Return-Path: Received: from mnementh.archaic.org.uk (mnementh.archaic.org.uk. [2001:8b0:1d0::1]) by mx.google.com with ESMTPS id w126si6002720wmb.120.2015.12.11.08.37.17 for (version=TLS1_2 cipher=AES128-SHA bits=128/128); Fri, 11 Dec 2015 08:37:17 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::1 as permitted sender) client-ip=2001:8b0:1d0::1; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::1 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1a7Qgx-0001JD-Pw; Fri, 11 Dec 2015 16:37:11 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, qemu-arm@nongnu.org, Alistair Francis , Peter Crosthwaite , "Edgar E. Iglesias" , Markus Armbruster , Paolo Bonzini , Kevin O'Connor Subject: [PATCH 10/10] hw/sd/pxa2xx_mmci: Add reset function Date: Fri, 11 Dec 2015 16:37:11 +0000 Message-Id: <1449851831-4966-11-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1449851831-4966-1-git-send-email-peter.maydell@linaro.org> References: <1449851831-4966-1-git-send-email-peter.maydell@linaro.org> Add a reset function to the pxa2xx_mmci device; previously it had no handling for system reset at all. Signed-off-by: Peter Maydell --- hw/sd/pxa2xx_mmci.c | 37 +++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) -- 1.9.1 diff --git a/hw/sd/pxa2xx_mmci.c b/hw/sd/pxa2xx_mmci.c index 81fec4d..3df927e 100644 --- a/hw/sd/pxa2xx_mmci.c +++ b/hw/sd/pxa2xx_mmci.c @@ -510,6 +510,35 @@ void pxa2xx_mmci_handlers(PXA2xxMMCIState *s, qemu_irq readonly, pxa2xx_mmci_set_readonly(dev, sdbus_get_readonly(&s->sdbus)); } +static void pxa2xx_mmci_reset(DeviceState *d) +{ + PXA2xxMMCIState *s = PXA2XX_MMCI(d); + + s->status = 0; + s->clkrt = 0; + s->spi = 0; + s->cmdat = 0; + s->resp_tout = 0; + s->read_tout = 0; + s->blklen = 0; + s->numblk = 0; + s->intmask = 0; + s->intreq = 0; + s->cmd = 0; + s->arg = 0; + s->active = 0; + s->bytesleft = 0; + s->tx_start = 0; + s->tx_len = 0; + s->rx_start = 0; + s->rx_len = 0; + s->resp_len = 0; + s->cmdreq = 0; + memset(s->tx_fifo, 0, sizeof(s->tx_fifo)); + memset(s->rx_fifo, 0, sizeof(s->rx_fifo)); + memset(s->resp_fifo, 0, sizeof(s->resp_fifo)); +} + static void pxa2xx_mmci_instance_init(Object *obj) { PXA2xxMMCIState *s = PXA2XX_MMCI(obj); @@ -526,6 +555,13 @@ static void pxa2xx_mmci_instance_init(Object *obj) TYPE_PXA2XX_MMCI_BUS, DEVICE(obj), "sd-bus"); } +static void pxa2xx_mmci_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc = DEVICE_CLASS(klass); + + dc->reset = pxa2xx_mmci_reset; +} + static void pxa2xx_mmci_bus_class_init(ObjectClass *klass, void *data) { SDBusClass *sbc = SD_BUS_CLASS(klass); @@ -539,6 +575,7 @@ static const TypeInfo pxa2xx_mmci_info = { .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(PXA2xxMMCIState), .instance_init = pxa2xx_mmci_instance_init, + .class_init = pxa2xx_mmci_class_init, }; static const TypeInfo pxa2xx_mmci_bus_info = {