From patchwork Tue Nov 3 14:13:16 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 55941 Delivered-To: patch@linaro.org Received: by 10.112.61.134 with SMTP id p6csp1866473lbr; Tue, 3 Nov 2015 06:29:29 -0800 (PST) X-Received: by 10.140.155.15 with SMTP id b15mr37785791qhb.29.1446560969303; Tue, 03 Nov 2015 06:29:29 -0800 (PST) Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id 127si22428351qhf.115.2015.11.03.06.29.29 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 03 Nov 2015 06:29:29 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Received: from localhost ([::1]:48907 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZtcaW-00025G-RE for patch@linaro.org; Tue, 03 Nov 2015 09:29:28 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55032) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZtcL7-0001ku-5c for qemu-devel@nongnu.org; Tue, 03 Nov 2015 09:13:34 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZtcL2-0007ua-Qv for qemu-devel@nongnu.org; Tue, 03 Nov 2015 09:13:33 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:35243) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZtcL2-0007sB-KV for qemu-devel@nongnu.org; Tue, 03 Nov 2015 09:13:28 -0500 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1ZtcKt-0003FW-Nw for qemu-devel@nongnu.org; Tue, 03 Nov 2015 14:13:19 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 3 Nov 2015 14:13:16 +0000 Message-Id: <1446559999-12413-11-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1446559999-12413-1-git-send-email-peter.maydell@linaro.org> References: <1446559999-12413-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Subject: [Qemu-devel] [PULL 10/13] target-arm: Report S/NS status in the CPU debug logs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org If this CPU supports EL3, enhance the printing of the current CPU mode in debug logging to distinguish S from NS modes as appropriate. Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias Reviewed-by: Alex Bennée Message-id: 1445883178-576-3-git-send-email-peter.maydell@linaro.org --- target-arm/translate-a64.c | 11 ++++++++++- target-arm/translate.c | 12 +++++++++++- 2 files changed, 21 insertions(+), 2 deletions(-) -- 1.9.1 diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 57503a0..d7e0954 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -127,6 +127,7 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f, uint32_t psr = pstate_read(env); int i; int el = arm_current_el(env); + const char *ns_status; cpu_fprintf(f, "PC=%016"PRIx64" SP=%016"PRIx64"\n", env->pc, env->xregs[31]); @@ -138,12 +139,20 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f, cpu_fprintf(f, " "); } } - cpu_fprintf(f, "\nPSTATE=%08x %c%c%c%c EL%d%c\n", + + if (arm_feature(env, ARM_FEATURE_EL3) && el != 3) { + ns_status = env->cp15.scr_el3 & SCR_NS ? "NS " : "S "; + } else { + ns_status = ""; + } + + cpu_fprintf(f, "\nPSTATE=%08x %c%c%c%c %sEL%d%c\n", psr, psr & PSTATE_N ? 'N' : '-', psr & PSTATE_Z ? 'Z' : '-', psr & PSTATE_C ? 'C' : '-', psr & PSTATE_V ? 'V' : '-', + ns_status, el, psr & PSTATE_SP ? 'h' : 't'); diff --git a/target-arm/translate.c b/target-arm/translate.c index b10a455..ff262a2 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -11602,6 +11602,7 @@ void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, CPUARMState *env = &cpu->env; int i; uint32_t psr; + const char *ns_status; if (is_a64(env)) { aarch64_cpu_dump_state(cs, f, cpu_fprintf, flags); @@ -11616,13 +11617,22 @@ void arm_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, cpu_fprintf(f, " "); } psr = cpsr_read(env); - cpu_fprintf(f, "PSR=%08x %c%c%c%c %c %s%d\n", + + if (arm_feature(env, ARM_FEATURE_EL3) && + (psr & CPSR_M) != ARM_CPU_MODE_MON) { + ns_status = env->cp15.scr_el3 & SCR_NS ? "NS " : "S "; + } else { + ns_status = ""; + } + + cpu_fprintf(f, "PSR=%08x %c%c%c%c %c %s%s%d\n", psr, psr & (1 << 31) ? 'N' : '-', psr & (1 << 30) ? 'Z' : '-', psr & (1 << 29) ? 'C' : '-', psr & (1 << 28) ? 'V' : '-', psr & CPSR_T ? 'T' : 'A', + ns_status, cpu_mode_names[psr & 0xf], (psr & 0x10) ? 32 : 26); if (flags & CPU_DUMP_FPU) {