From patchwork Tue Oct 27 14:33:18 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 55626 Delivered-To: patch@linaro.org Received: by 10.112.59.35 with SMTP id w3csp1840108lbq; Tue, 27 Oct 2015 07:48:21 -0700 (PDT) X-Received: by 10.140.25.166 with SMTP id 35mr40838738qgt.96.1445957301204; Tue, 27 Oct 2015 07:48:21 -0700 (PDT) Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id e22si37402001qkj.82.2015.10.27.07.48.20 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 27 Oct 2015 07:48:21 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org Received: from localhost ([::1]:60173 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zr5Xw-0001cR-Nx for patch@linaro.org; Tue, 27 Oct 2015 10:48:20 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56882) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zr5Jh-0001ZG-Jz for qemu-devel@nongnu.org; Tue, 27 Oct 2015 10:33:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Zr5Jc-0007V6-Tj for qemu-devel@nongnu.org; Tue, 27 Oct 2015 10:33:37 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:35204) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Zr5Jc-0007Sy-Nd for qemu-devel@nongnu.org; Tue, 27 Oct 2015 10:33:32 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1Zr5Ja-0000V4-9P for qemu-devel@nongnu.org; Tue, 27 Oct 2015 14:33:30 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 27 Oct 2015 14:33:18 +0000 Message-Id: <1445956409-1818-17-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1445956409-1818-1-git-send-email-peter.maydell@linaro.org> References: <1445956409-1818-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Subject: [Qemu-devel] [PULL 16/27] target-arm: lpae: Move declaration of t0sz and t1sz X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: "Edgar E. Iglesias" Move declaration of t0sz and t1sz to the top of the function avoiding a mix of code and variable declarations. No functional change. Signed-off-by: Edgar E. Iglesias Message-id: 1445864527-14520-4-git-send-email-edgar.iglesias@gmail.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target-arm/helper.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) -- 1.9.1 diff --git a/target-arm/helper.c b/target-arm/helper.c index d07b4b7..0086feb 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -6480,6 +6480,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, MMUFaultType fault_type = translation_fault; uint32_t level = 1; uint32_t epd = 0; + int32_t t0sz, t1sz; int32_t tsz; uint32_t tg; uint64_t ttbr; @@ -6535,12 +6536,12 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, * This is a Non-secure PL0/1 stage 1 translation, so controlled by * TTBCR/TTBR0/TTBR1 in accordance with ARM ARM DDI0406C table B-32: */ - int32_t t0sz = extract32(tcr->raw_tcr, 0, 6); + t0sz = extract32(tcr->raw_tcr, 0, 6); if (va_size == 64) { t0sz = MIN(t0sz, 39); t0sz = MAX(t0sz, 16); } - int32_t t1sz = extract32(tcr->raw_tcr, 16, 6); + t1sz = extract32(tcr->raw_tcr, 16, 6); if (va_size == 64) { t1sz = MIN(t1sz, 39); t1sz = MAX(t1sz, 16);