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X-Original-Sender: tushar.jagad@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.52 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Sync arm/arm64 headers for bringing in support for cross cpu. Signed-off-by: Tushar Jagad --- linux-headers/asm-arm64/kvm.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h index c8abf25..94d1fc9 100644 --- a/linux-headers/asm-arm64/kvm.h +++ b/linux-headers/asm-arm64/kvm.h @@ -88,6 +88,13 @@ struct kvm_regs { #define KVM_ARM_VCPU_POWER_OFF 0 /* CPU is started in OFF state */ #define KVM_ARM_VCPU_EL1_32BIT 1 /* CPU running a 32bit VM */ #define KVM_ARM_VCPU_PSCI_0_2 2 /* CPU uses PSCI v0.2 */ +#define KVM_ARM_VCPU_NUM_BPTS 3 /* Number of breakpoints supported */ +#define KVM_ARM_VCPU_NUM_WPTS 7 /* Number of watchpoints supported */ + +#define KVM_ARM_VCPU_BPTS_FEATURES_IDX 0 +#define KVM_ARM_VCPU_WPTS_FEATURES_IDX 0 +#define KVM_ARM_VCPU_BPTS_MASK 0x00000078 +#define KVM_ARM_VCPU_WPTS_MASK 0x00000780 struct kvm_vcpu_init { __u32 target; @@ -193,7 +200,9 @@ struct kvm_arch_memory_slot { * and only here to provide source code level compatibility with older * userland. The highest SPI number can be set via KVM_DEV_ARM_VGIC_GRP_NR_IRQS. */ +#ifndef __KERNEL__ #define KVM_ARM_IRQ_GIC_MAX 127 +#endif /* One single KVM irqchip, ie. the VGIC */ #define KVM_NR_IRQCHIPS 1