From patchwork Fri Sep 4 15:05:40 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 53102 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-lb0-f200.google.com (mail-lb0-f200.google.com [209.85.217.200]) by patches.linaro.org (Postfix) with ESMTPS id 7BE7822E23 for ; Fri, 4 Sep 2015 15:09:23 +0000 (UTC) Received: by lbcao8 with SMTP id ao8sf7813661lbc.1 for ; Fri, 04 Sep 2015 08:09:22 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:date :message-id:in-reply-to:references:subject:precedence:list-id :list-unsubscribe:list-archive:list-post:list-help:list-subscribe :errors-to:sender:x-original-sender :x-original-authentication-results:mailing-list; bh=R92796tfTDl9JJQ0peBhH4Ui4zWO4lbhaW7X+jdXakk=; b=Ppgvk8QjNq4T5KQqfQyr8fNsns7rIH8VnLVS3LSQnsn1lfcoYEs0tnSOREYtUqYoon lITpkz4A5r8t0efJfFsxLAZqhQNgR/c1Fq6Rv0LSqhnT1ZRFfTUXM5m4VRzG/GuNxszr NkttC3yDgixeZq4Rwp44zjQLutyn3aPhVE+bBc/B4BFny5qEQ0m+JaSdqfASouqK2WMZ Q2+pIqs+5dafYJ54O3gr0ZpdCzs9+/lBm/9LzCSF2S0IvAw6gNJM7+vngbLRNU9uAoS3 6w6lDAB2gChM/69+QaSHohVif6+eFFEJzTK2HN7H2p1YZ4UEnLzPcFX2thV7qi4/xO0s yjdg== X-Gm-Message-State: ALoCoQnwHZZL3TUlSR4uEB9RIKGNWjGZTAkrADP/A8goImNVizheftwsXLHAocT6mNVAB9O1Dauj X-Received: by 10.152.19.234 with SMTP id i10mr60987lae.8.1441379362523; Fri, 04 Sep 2015 08:09:22 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.9.164 with SMTP id a4ls292632lab.105.gmail; Fri, 04 Sep 2015 08:09:22 -0700 (PDT) X-Received: by 10.152.21.130 with SMTP id v2mr4175659lae.48.1441379362355; Fri, 04 Sep 2015 08:09:22 -0700 (PDT) Received: from mail-la0-f45.google.com (mail-la0-f45.google.com. [209.85.215.45]) by mx.google.com with ESMTPS id 6si2559127lam.37.2015.09.04.08.09.22 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 04 Sep 2015 08:09:22 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.45 as permitted sender) client-ip=209.85.215.45; Received: by lagj9 with SMTP id j9so15713798lag.2 for ; Fri, 04 Sep 2015 08:09:22 -0700 (PDT) X-Received: by 10.152.18.164 with SMTP id x4mr4211979lad.35.1441379362250; Fri, 04 Sep 2015 08:09:22 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.164.42 with SMTP id yn10csp2045301lbb; Fri, 4 Sep 2015 08:09:20 -0700 (PDT) X-Received: by 10.140.129.22 with SMTP id 22mr6155692qhb.16.1441379359159; Fri, 04 Sep 2015 08:09:19 -0700 (PDT) Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id f139si3095200qhc.51.2015.09.04.08.09.18 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 04 Sep 2015 08:09:19 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:60558 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZXsc9-00059W-QK for patch@linaro.org; Fri, 04 Sep 2015 11:09:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38048) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZXsZA-0008TW-9p for qemu-devel@nongnu.org; Fri, 04 Sep 2015 11:06:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZXsZ7-0000q9-Uq for qemu-devel@nongnu.org; Fri, 04 Sep 2015 11:06:12 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:35023) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZXsZ7-0000iE-Ks for qemu-devel@nongnu.org; Fri, 04 Sep 2015 11:06:09 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1ZXsYu-0006FI-Jz for qemu-devel@nongnu.org; Fri, 04 Sep 2015 16:05:56 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 4 Sep 2015 16:05:40 +0100 Message-Id: <1441379156-23939-12-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1441379156-23939-1-git-send-email-peter.maydell@linaro.org> References: <1441379156-23939-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Subject: [Qemu-devel] [PULL 11/27] smbios: add smbios 3.0 support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.45 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Wei Huang This patch adds support for SMBIOS 3.0 entry point. When caller invokes smbios_set_defaults(), it can specify entry point as 2.1 or 3.0. Then smbios_get_tables() will return the entry point table in right format. Acked-by: Gabriel Somlo Tested-by: Gabriel Somlo Tested-by: Leif Lindholm Signed-off-by: Wei Huang Reviewed-by: Laszlo Ersek Message-id: 1440615870-9518-2-git-send-email-wei@redhat.com Signed-off-by: Peter Maydell --- hw/i386/pc_piix.c | 3 +- hw/i386/pc_q35.c | 3 +- hw/smbios/smbios.c | 84 +++++++++++++++++++++++++++++++++------------- include/hw/smbios/smbios.h | 62 ++++++++++++++++++++++++++-------- tests/bios-tables-test.c | 6 ++-- 5 files changed, 116 insertions(+), 42 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 9558467..b82921d 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -173,7 +173,8 @@ static void pc_init1(MachineState *machine) MachineClass *mc = MACHINE_GET_CLASS(machine); /* These values are guest ABI, do not change */ smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)", - mc->name, smbios_legacy_mode, smbios_uuid_encoded); + mc->name, smbios_legacy_mode, smbios_uuid_encoded, + SMBIOS_ENTRY_POINT_21); } /* allocate ram and load rom/bios */ diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index c07d65b..7217cbf 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -165,7 +165,8 @@ static void pc_q35_init(MachineState *machine) if (smbios_defaults) { /* These values are guest ABI, do not change */ smbios_set_defaults("QEMU", "Standard PC (Q35 + ICH9, 2009)", - mc->name, smbios_legacy_mode, smbios_uuid_encoded); + mc->name, smbios_legacy_mode, smbios_uuid_encoded, + SMBIOS_ENTRY_POINT_21); } /* allocate ram and load rom/bios */ diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c index efdbb5d..b81a1d3 100644 --- a/hw/smbios/smbios.c +++ b/hw/smbios/smbios.c @@ -55,7 +55,9 @@ static uint8_t *smbios_tables; static size_t smbios_tables_len; static unsigned smbios_table_max; static unsigned smbios_table_cnt; -static struct smbios_entry_point ep; +static SmbiosEntryPointType smbios_ep_type = SMBIOS_ENTRY_POINT_21; + +static SmbiosEntryPoint ep; static int smbios_type4_count = 0; static bool smbios_immutable; @@ -771,11 +773,12 @@ void smbios_set_cpuid(uint32_t version, uint32_t features) void smbios_set_defaults(const char *manufacturer, const char *product, const char *version, bool legacy_mode, - bool uuid_encoded) + bool uuid_encoded, SmbiosEntryPointType ep_type) { smbios_have_defaults = true; smbios_legacy = legacy_mode; smbios_uuid_encoded = uuid_encoded; + smbios_ep_type = ep_type; /* drop unwanted version of command-line file blob(s) */ if (smbios_legacy) { @@ -808,26 +811,53 @@ void smbios_set_defaults(const char *manufacturer, const char *product, static void smbios_entry_point_setup(void) { - memcpy(ep.anchor_string, "_SM_", 4); - memcpy(ep.intermediate_anchor_string, "_DMI_", 5); - ep.length = sizeof(struct smbios_entry_point); - ep.entry_point_revision = 0; /* formatted_area reserved, per spec v2.1+ */ - memset(ep.formatted_area, 0, 5); - - /* compliant with smbios spec v2.8 */ - ep.smbios_major_version = 2; - ep.smbios_minor_version = 8; - ep.smbios_bcd_revision = 0x28; - - /* set during table construction, but BIOS may override: */ - ep.structure_table_length = cpu_to_le16(smbios_tables_len); - ep.max_structure_size = cpu_to_le16(smbios_table_max); - ep.number_of_structures = cpu_to_le16(smbios_table_cnt); - - /* BIOS must recalculate: */ - ep.checksum = 0; - ep.intermediate_checksum = 0; - ep.structure_table_address = cpu_to_le32(0); + switch (smbios_ep_type) { + case SMBIOS_ENTRY_POINT_21: + memcpy(ep.ep21.anchor_string, "_SM_", 4); + memcpy(ep.ep21.intermediate_anchor_string, "_DMI_", 5); + ep.ep21.length = sizeof(struct smbios_21_entry_point); + ep.ep21.entry_point_revision = 0; /* formatted_area reserved */ + memset(ep.ep21.formatted_area, 0, 5); + + /* compliant with smbios spec v2.8 */ + ep.ep21.smbios_major_version = 2; + ep.ep21.smbios_minor_version = 8; + ep.ep21.smbios_bcd_revision = 0x28; + + /* set during table construction, but BIOS may override: */ + ep.ep21.structure_table_length = cpu_to_le16(smbios_tables_len); + ep.ep21.max_structure_size = cpu_to_le16(smbios_table_max); + ep.ep21.number_of_structures = cpu_to_le16(smbios_table_cnt); + + /* BIOS must recalculate */ + ep.ep21.checksum = 0; + ep.ep21.intermediate_checksum = 0; + ep.ep21.structure_table_address = cpu_to_le32(0); + + break; + case SMBIOS_ENTRY_POINT_30: + memcpy(ep.ep30.anchor_string, "_SM3_", 5); + ep.ep30.length = sizeof(struct smbios_30_entry_point); + ep.ep30.entry_point_revision = 1; + ep.ep30.reserved = 0; + + /* compliant with smbios spec 3.0 */ + ep.ep30.smbios_major_version = 3; + ep.ep30.smbios_minor_version = 0; + ep.ep30.smbios_doc_rev = 0; + + /* set during table construct, but BIOS might override */ + ep.ep30.structure_table_max_size = cpu_to_le32(smbios_tables_len); + + /* BIOS must recalculate */ + ep.ep30.checksum = 0; + ep.ep30.structure_table_address = cpu_to_le64(0); + + break; + default: + abort(); + break; + } } void smbios_get_tables(const struct smbios_phys_mem_area *mem_array, @@ -885,7 +915,15 @@ void smbios_get_tables(const struct smbios_phys_mem_area *mem_array, *tables = smbios_tables; *tables_len = smbios_tables_len; *anchor = (uint8_t *)&ep; - *anchor_len = sizeof(struct smbios_entry_point); + + /* calculate length based on anchor string */ + if (!strncmp((char *)&ep, "_SM_", 4)) { + *anchor_len = sizeof(struct smbios_21_entry_point); + } else if (!strncmp((char *)&ep, "_SM3_", 5)) { + *anchor_len = sizeof(struct smbios_30_entry_point); + } else { + abort(); + } } static void save_opt(const char **dest, QemuOpts *opts, const char *name) diff --git a/include/hw/smbios/smbios.h b/include/hw/smbios/smbios.h index 4269aab..76ccf70 100644 --- a/include/hw/smbios/smbios.h +++ b/include/hw/smbios/smbios.h @@ -23,25 +23,27 @@ struct smbios_phys_mem_area { uint64_t length; }; -void smbios_entry_add(QemuOpts *opts); -void smbios_set_cpuid(uint32_t version, uint32_t features); -void smbios_set_defaults(const char *manufacturer, const char *product, - const char *version, bool legacy_mode, - bool uuid_encoded); -uint8_t *smbios_get_table_legacy(size_t *length); -void smbios_get_tables(const struct smbios_phys_mem_area *mem_array, - const unsigned int mem_array_size, - uint8_t **tables, size_t *tables_len, - uint8_t **anchor, size_t *anchor_len); - /* * SMBIOS spec defined tables */ +typedef enum SmbiosEntryPointType { + SMBIOS_ENTRY_POINT_21, + SMBIOS_ENTRY_POINT_30, +} SmbiosEntryPointType; + +/* SMBIOS Entry Point + * There are two types of entry points defined in the SMBIOS specification + * (see below). BIOS must place the entry point(s) at a 16-bit-aligned + * address between 0xf0000 and 0xfffff. Note that either entry point type + * can be used in a 64-bit target system, except that SMBIOS 2.1 entry point + * only allows the SMBIOS struct table to reside below 4GB address space. + */ -/* SMBIOS entry point (anchor). - * BIOS must place this at a 16-bit-aligned address between 0xf0000 and 0xfffff. +/* SMBIOS 2.1 (32-bit) Entry Point + * - introduced since SMBIOS 2.1 + * - supports structure table below 4GB only */ -struct smbios_entry_point { +struct smbios_21_entry_point { uint8_t anchor_string[4]; uint8_t checksum; uint8_t length; @@ -58,6 +60,28 @@ struct smbios_entry_point { uint8_t smbios_bcd_revision; } QEMU_PACKED; +/* SMBIOS 3.0 (64-bit) Entry Point + * - introduced since SMBIOS 3.0 + * - supports structure table at 64-bit address space + */ +struct smbios_30_entry_point { + uint8_t anchor_string[5]; + uint8_t checksum; + uint8_t length; + uint8_t smbios_major_version; + uint8_t smbios_minor_version; + uint8_t smbios_doc_rev; + uint8_t entry_point_revision; + uint8_t reserved; + uint32_t structure_table_max_size; + uint64_t structure_table_address; +} QEMU_PACKED; + +typedef union { + struct smbios_21_entry_point ep21; + struct smbios_30_entry_point ep30; +} QEMU_PACKED SmbiosEntryPoint; + /* This goes at the beginning of every SMBIOS structure. */ struct smbios_structure_header { uint8_t type; @@ -232,4 +256,14 @@ struct smbios_type_127 { struct smbios_structure_header header; } QEMU_PACKED; +void smbios_entry_add(QemuOpts *opts); +void smbios_set_cpuid(uint32_t version, uint32_t features); +void smbios_set_defaults(const char *manufacturer, const char *product, + const char *version, bool legacy_mode, + bool uuid_encoded, SmbiosEntryPointType ep_type); +uint8_t *smbios_get_table_legacy(size_t *length); +void smbios_get_tables(const struct smbios_phys_mem_area *mem_array, + const unsigned int mem_array_size, + uint8_t **tables, size_t *tables_len, + uint8_t **anchor, size_t *anchor_len); #endif /*QEMU_SMBIOS_H */ diff --git a/tests/bios-tables-test.c b/tests/bios-tables-test.c index 613867a..9686328 100644 --- a/tests/bios-tables-test.c +++ b/tests/bios-tables-test.c @@ -50,7 +50,7 @@ typedef struct { int rsdt_tables_nr; GArray *tables; uint32_t smbios_ep_addr; - struct smbios_entry_point smbios_ep_table; + struct smbios_21_entry_point smbios_ep_table; } test_data; #define LOW(x) ((x) & 0xff) @@ -601,7 +601,7 @@ static void test_acpi_asl(test_data *data) static bool smbios_ep_table_ok(test_data *data) { - struct smbios_entry_point *ep_table = &data->smbios_ep_table; + struct smbios_21_entry_point *ep_table = &data->smbios_ep_table; uint32_t addr = data->smbios_ep_addr; ACPI_READ_ARRAY(ep_table->anchor_string, addr); @@ -681,7 +681,7 @@ static inline bool smbios_single_instance(uint8_t type) static void test_smbios_structs(test_data *data) { DECLARE_BITMAP(struct_bitmap, SMBIOS_MAX_TYPE+1) = { 0 }; - struct smbios_entry_point *ep_table = &data->smbios_ep_table; + struct smbios_21_entry_point *ep_table = &data->smbios_ep_table; uint32_t addr = ep_table->structure_table_address; int i, len, max_len = 0; uint8_t type, prv, crt;