From patchwork Mon Aug 3 09:14:48 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 51852 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-lb0-f197.google.com (mail-lb0-f197.google.com [209.85.217.197]) by patches.linaro.org (Postfix) with ESMTPS id 8ED21229FD for ; Mon, 3 Aug 2015 09:19:04 +0000 (UTC) Received: by lbbyj8 with SMTP id yj8sf22677790lbb.3 for ; Mon, 03 Aug 2015 02:19:03 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:date:message-id:in-reply-to :references:mime-version:content-type:content-transfer-encoding:cc :subject:precedence:list-id:list-unsubscribe:list-archive:list-post :list-help:list-subscribe:errors-to:sender:x-original-sender :x-original-authentication-results:mailing-list; bh=IDrKhnTd7javnVeOzDNmdLUcQ7j76/ikUttDmU3XP1o=; b=l/0/hZ+lGnp8NJGorlVZ39rrhAdy08dunEALUVn/lZcmTyDz6UxZHsTr9Hpj9XP0Zz 8nCAtYhl2BWIKdftDWMeryr8aEbqif7YyiarSn8ke8kyyOIdA38pvZChYDvbXg2Poe9R WcSV+tXtEEPsTJxj6Teb7UUX31hvT3Vfn6KLZ91maplLvh44DJ7m2/Dcd3wJyol2FSVd tbRm6CyHfQADDAS5bKe1f2DcFxf2rWBdPfSJ1sTYTkHwLr0sMSfOSDwlV6qAP5bQTZ9e ppZ9GZJABPrZyADIhF/2wUpDIbv+PY6jmKvpuv7fZ0qafO0OWOwdqTUGUpIdd7eo6jof a/tQ== X-Gm-Message-State: ALoCoQkur9JcCoAlzU2JQMga4lw6Y3bm2NZjVi/SUk2gVubETMuN8ikvceET+Ka9gghFdxhnA0zN X-Received: by 10.194.179.42 with SMTP id dd10mr5289223wjc.7.1438593543552; Mon, 03 Aug 2015 02:19:03 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.219.4 with SMTP id pk4ls551500lac.90.gmail; Mon, 03 Aug 2015 02:19:03 -0700 (PDT) X-Received: by 10.112.83.135 with SMTP id q7mr15869840lby.13.1438593542980; Mon, 03 Aug 2015 02:19:02 -0700 (PDT) Received: from mail-la0-f51.google.com (mail-la0-f51.google.com. [209.85.215.51]) by mx.google.com with ESMTPS id xh6si11430505lbb.112.2015.08.03.02.19.02 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 03 Aug 2015 02:19:02 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.51 as permitted sender) client-ip=209.85.215.51; Received: by labow3 with SMTP id ow3so12276249lab.1 for ; Mon, 03 Aug 2015 02:19:02 -0700 (PDT) X-Received: by 10.112.219.70 with SMTP id pm6mr15445328lbc.41.1438593542748; Mon, 03 Aug 2015 02:19:02 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.7.198 with SMTP id l6csp1755101lba; Mon, 3 Aug 2015 02:19:01 -0700 (PDT) X-Received: by 10.50.59.211 with SMTP id b19mr20031305igr.42.1438593541082; Mon, 03 Aug 2015 02:19:01 -0700 (PDT) Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id r89si13503235ioi.24.2015.08.03.02.19.00 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 03 Aug 2015 02:19:01 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:58198 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZMBtb-0002sP-RV for patch@linaro.org; Mon, 03 Aug 2015 05:18:59 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41282) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZMBpu-0005PC-C7 for qemu-devel@nongnu.org; Mon, 03 Aug 2015 05:15:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZMBps-0003LY-6E for qemu-devel@nongnu.org; Mon, 03 Aug 2015 05:15:10 -0400 Received: from mail-wi0-f177.google.com ([209.85.212.177]:37645) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZMBpr-0003L1-TP for qemu-devel@nongnu.org; Mon, 03 Aug 2015 05:15:08 -0400 Received: by wibud3 with SMTP id ud3so104918664wib.0 for ; Mon, 03 Aug 2015 02:15:07 -0700 (PDT) X-Received: by 10.194.184.82 with SMTP id es18mr33958201wjc.79.1438593307471; Mon, 03 Aug 2015 02:15:07 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id ej5sm21836328wjd.22.2015.08.03.02.15.03 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 03 Aug 2015 02:15:04 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id C4C3C3E086F; Mon, 3 Aug 2015 10:15:00 +0100 (BST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Date: Mon, 3 Aug 2015 10:14:48 +0100 Message-Id: <1438593291-27109-9-git-send-email-alex.bennee@linaro.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1438593291-27109-1-git-send-email-alex.bennee@linaro.org> References: <1438593291-27109-1-git-send-email-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.212.177 Cc: qemu-trivial@nongnu.org, crosthwaitepeter@gmail.com, pbonzini@redhat.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , aurelien@aurel32.net, rth@twiddle.net Subject: [Qemu-devel] [PATCH v4 08/11] qemu-log: dfilter-ise exec, out_asm, and op_opt X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: alex.bennee@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.51 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 This ensures the code generation debug code will honour -dfilter if set. For the "exec" tracing I've added a new inline macro for efficiency's sake. I've not touched CPU_LOG_TB_OP as this is buried in each individual target. Signed-off-by: Alex Bennée ---- v2 - checkpatch updates - add qemu_log_mask_and_addr macro for inline dump for traces - re-base on re-factored tcg layout - include new Trace & Link lines --- cpu-exec.c | 13 +++++++------ include/exec/exec-all.h | 8 +++++--- include/qemu/log.h | 15 +++++++++++++++ tcg/tcg.c | 6 ++++-- translate-all.c | 3 ++- 5 files changed, 33 insertions(+), 12 deletions(-) diff --git a/cpu-exec.c b/cpu-exec.c index a039f1a..d01d08e 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -181,8 +181,9 @@ static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb) uintptr_t next_tb; uint8_t *tb_ptr = itb->tc_ptr; - qemu_log_mask(CPU_LOG_EXEC, "Trace %p [" TARGET_FMT_lx "] %s\n", - itb->tc_ptr, itb->pc, lookup_symbol(itb->pc)); + qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc, + "Trace %p [" TARGET_FMT_lx "] %s\n", + itb->tc_ptr, itb->pc, lookup_symbol(itb->pc)); #if defined(DEBUG_DISAS) if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) { @@ -213,10 +214,10 @@ static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb) */ CPUClass *cc = CPU_GET_CLASS(cpu); TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK); - qemu_log_mask(CPU_LOG_EXEC, - "Abandoned execution of TB chain before %p [" - TARGET_FMT_lx "] %s\n", - itb->tc_ptr, itb->pc, lookup_symbol(itb->pc)); + qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc, + "Abandoned execution of TB chain before %p [" + TARGET_FMT_lx "] %s\n", + itb->tc_ptr, itb->pc, lookup_symbol(itb->pc)); if (cc->synchronize_from_tb) { cc->synchronize_from_tb(cpu, tb); } else { diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 361d3d2..51276ab 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -282,9 +282,11 @@ static inline void tb_add_jump(TranslationBlock *tb, int n, { /* NOTE: this test is only needed for thread safety */ if (!tb->jmp_next[n]) { - qemu_log_mask(CPU_LOG_EXEC, "Linking TBs %p [" TARGET_FMT_lx - "] index %d -> %p [" TARGET_FMT_lx "]\n", - tb->tc_ptr, tb->pc, n, tb_next->tc_ptr, tb_next->pc); + qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc, + "Linking TBs %p [" TARGET_FMT_lx + "] index %d -> %p [" TARGET_FMT_lx "]\n", + tb->tc_ptr, tb->pc, n, + tb_next->tc_ptr, tb_next->pc); /* patch the native jump address */ tb_set_jmp_target(tb, n, (uintptr_t)tb_next->tc_ptr); diff --git a/include/qemu/log.h b/include/qemu/log.h index ade1f76..0b0eef5 100644 --- a/include/qemu/log.h +++ b/include/qemu/log.h @@ -77,6 +77,21 @@ qemu_log_vprintf(const char *fmt, va_list va) } \ } while (0) +/* log only if a bit is set on the current loglevel mask + * and we are in the address range we care about: + * @mask: bit to check in the mask + * @addr: address to check in dfilter + * @fmt: printf-style format string + * @args: optional arguments for format string + */ +#define qemu_log_mask_and_addr(MASK, ADDR, FMT, ...) \ + do { \ + if (unlikely(qemu_loglevel_mask(MASK)) && \ + qemu_log_in_addr_range(ADDR)) { \ + qemu_log(FMT, ## __VA_ARGS__); \ + } \ + } while (0) + /* Special cases: */ /* cpu_dump_state() logging functions: */ diff --git a/tcg/tcg.c b/tcg/tcg.c index 587bd89..ed42204 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -2305,7 +2305,8 @@ static inline int tcg_gen_code_common(TCGContext *s, TranslationBlock *tb, g_assert(tb->tc_size == 0 || search_pc > 0); #ifdef DEBUG_DISAS - if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) { + if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP) + && qemu_log_in_addr_range(tb->pc))) { qemu_log("OP:\n"); tcg_dump_ops(s); qemu_log("\n"); @@ -2332,7 +2333,8 @@ static inline int tcg_gen_code_common(TCGContext *s, TranslationBlock *tb, #endif #ifdef DEBUG_DISAS - if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) { + if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT) + && qemu_log_in_addr_range(tb->pc))) { qemu_log("OP after optimization and liveness analysis:\n"); tcg_dump_ops(s); qemu_log("\n"); diff --git a/translate-all.c b/translate-all.c index e8072d8..facd516 100644 --- a/translate-all.c +++ b/translate-all.c @@ -205,7 +205,8 @@ void cpu_gen_code(CPUArchState *env, TranslationBlock *tb) tb_write_perfmap(tb->tc_ptr, tb->tc_size, tb->pc); #ifdef DEBUG_DISAS - if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) { + if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM) && + qemu_log_in_addr_range(tb->pc)) { qemu_log("OUT: [size=%d]\n", tb->tc_size); log_disas(tb->tc_ptr, tb->tc_size); qemu_log("\n");