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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id 13si13469505ioi.179.2015.08.03.02.22.11 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 03 Aug 2015 02:22:12 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:58238 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZMBwh-0000Lm-8R for patch@linaro.org; Mon, 03 Aug 2015 05:22:11 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41292) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZMBpu-0005Pl-PY for qemu-devel@nongnu.org; Mon, 03 Aug 2015 05:15:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZMBpq-0003In-Vb for qemu-devel@nongnu.org; Mon, 03 Aug 2015 05:15:10 -0400 Received: from mail-wi0-f170.google.com ([209.85.212.170]:38606) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZMBpq-0003Gw-Qd for qemu-devel@nongnu.org; Mon, 03 Aug 2015 05:15:06 -0400 Received: by wibxm9 with SMTP id xm9so105251141wib.1 for ; Mon, 03 Aug 2015 02:15:06 -0700 (PDT) X-Received: by 10.180.94.7 with SMTP id cy7mr29695066wib.79.1438593306307; Mon, 03 Aug 2015 02:15:06 -0700 (PDT) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id m4sm21812180wjb.37.2015.08.03.02.15.04 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 03 Aug 2015 02:15:04 -0700 (PDT) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id D7ED53E08A5; Mon, 3 Aug 2015 10:15:00 +0100 (BST) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Date: Mon, 3 Aug 2015 10:14:49 +0100 Message-Id: <1438593291-27109-10-git-send-email-alex.bennee@linaro.org> X-Mailer: git-send-email 2.5.0 In-Reply-To: <1438593291-27109-1-git-send-email-alex.bennee@linaro.org> References: <1438593291-27109-1-git-send-email-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.212.170 Cc: Peter Maydell , qemu-trivial@nongnu.org, crosthwaitepeter@gmail.com, pbonzini@redhat.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , aurelien@aurel32.net, rth@twiddle.net Subject: [Qemu-devel] [PATCH v4 09/11] target-arm: dfilter support for in_asm, op, opt_op X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: alex.bennee@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.43 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Each individual architecture needs to use the qemu_log_in_addr_range() feature for enabling in_asm and marking blocks for op/opt_op output. Signed-off-by: Alex Bennée --- target-arm/translate-a64.c | 6 ++++-- target-arm/translate.c | 6 ++++-- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 689f2be..0b0f4ae 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -11026,7 +11026,8 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu, gen_io_start(); } - if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) { + if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT) && + qemu_log_in_addr_range(dc->pc))) { tcg_gen_debug_insn_start(dc->pc); } @@ -11131,7 +11132,8 @@ done_generating: gen_tb_end(tb, num_insns); #ifdef DEBUG_DISAS - if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { + if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) && + qemu_log_in_addr_range(pc_start)) { qemu_log("----------------\n"); qemu_log("IN: %s\n", lookup_symbol(pc_start)); log_target_disas(cs, pc_start, dc->pc - pc_start, diff --git a/target-arm/translate.c b/target-arm/translate.c index 69ac18c..c914be0 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -11316,7 +11316,8 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu, if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) gen_io_start(); - if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) { + if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT)) && + qemu_log_in_addr_range(dc->pc)) { tcg_gen_debug_insn_start(dc->pc); } @@ -11489,7 +11490,8 @@ done_generating: gen_tb_end(tb, num_insns); #ifdef DEBUG_DISAS - if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { + if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) && + qemu_log_in_addr_range(pc_start)) { qemu_log("----------------\n"); qemu_log("IN: %s\n", lookup_symbol(pc_start)); log_target_disas(cs, pc_start, dc->pc - pc_start,