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[208.118.235.17]) by mx.google.com with ESMTPS id hk6si8190383pac.147.2015.07.02.02.51.39 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 02 Jul 2015 02:51:41 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; Received: from localhost ([::1]:35612 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZAb9f-0001nh-Ex for patch@linaro.org; Thu, 02 Jul 2015 05:51:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36179) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZAb8L-0000MM-5N for qemu-devel@nongnu.org; Thu, 02 Jul 2015 05:50:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZAb8K-0008Ra-67 for qemu-devel@nongnu.org; Thu, 02 Jul 2015 05:50:17 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:58084) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZAb8D-0008Nd-N4; Thu, 02 Jul 2015 05:50:10 -0400 Received: from 172.24.2.119 (EHLO szxeml428-hub.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CNZ28140; Thu, 02 Jul 2015 17:50:01 +0800 (CST) Received: from HGHY1Z002260041.china.huawei.com (10.177.16.142) by szxeml428-hub.china.huawei.com (10.82.67.183) with Microsoft SMTP Server id 14.3.158.1; Thu, 2 Jul 2015 17:49:51 +0800 From: Shannon Zhao To: Date: Thu, 2 Jul 2015 17:49:20 +0800 Message-ID: <1435830563-3072-8-git-send-email-zhaoshenglong@huawei.com> X-Mailer: git-send-email 1.9.0.msysgit.0 In-Reply-To: <1435830563-3072-1-git-send-email-zhaoshenglong@huawei.com> References: <1435830563-3072-1-git-send-email-zhaoshenglong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.16.142] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x-2.6.x [generic] X-Received-From: 119.145.14.65 Cc: qemu-trivial@nongnu.org, mjt@tls.msk.ru, shannon.zhao@linaro.org Subject: [Qemu-devel] [PATCH 07/10] hw/arm/spitz.c: Fix misusing qemu_allocate_irqs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: patch@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.174 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Shannon Zhao Use qemu_allocate_irq instead of qemu_allocate_irqs to fix memory leak. Signed-off-by: Shannon Zhao Signed-off-by: Shannon Zhao --- hw/arm/spitz.c | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c index 5bf032a..d51180a 100644 --- a/hw/arm/spitz.c +++ b/hw/arm/spitz.c @@ -815,19 +815,24 @@ static void spitz_out_switch(void *opaque, int line, int level) static void spitz_scoop_gpio_setup(PXA2xxState *cpu, DeviceState *scp0, DeviceState *scp1) { - qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8); - - qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]); - qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]); - qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]); - qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]); + qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, + qemu_allocate_irq(spitz_out_switch, cpu, 0)); + qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, + qemu_allocate_irq(spitz_out_switch, cpu, 1)); + qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, + qemu_allocate_irq(spitz_out_switch, cpu, 2)); + qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, + qemu_allocate_irq(spitz_out_switch, cpu, 3)); if (scp1) { - qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]); - qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]); + qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, + qemu_allocate_irq(spitz_out_switch, cpu, 4)); + qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, + qemu_allocate_irq(spitz_out_switch, cpu, 5)); } - qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]); + qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, + qemu_allocate_irq(spitz_out_switch, cpu, 6)); } #define SPITZ_GPIO_HSYNC 22