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[208.118.235.17]) by mx.google.com with ESMTPS id i1si8224347pdg.86.2015.07.02.02.51.35 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 02 Jul 2015 02:51:36 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; Received: from localhost ([::1]:35610 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZAb9b-0001g7-3f for patch@linaro.org; Thu, 02 Jul 2015 05:51:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36173) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZAb8K-0000MA-UU for qemu-devel@nongnu.org; Thu, 02 Jul 2015 05:50:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZAb8J-0008RO-Tg for qemu-devel@nongnu.org; Thu, 02 Jul 2015 05:50:16 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:58085) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZAb8D-0008Nf-Ma; Thu, 02 Jul 2015 05:50:10 -0400 Received: from 172.24.2.119 (EHLO szxeml428-hub.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CNZ28134; Thu, 02 Jul 2015 17:50:00 +0800 (CST) Received: from HGHY1Z002260041.china.huawei.com (10.177.16.142) by szxeml428-hub.china.huawei.com (10.82.67.183) with Microsoft SMTP Server id 14.3.158.1; Thu, 2 Jul 2015 17:49:50 +0800 From: Shannon Zhao To: Date: Thu, 2 Jul 2015 17:49:19 +0800 Message-ID: <1435830563-3072-7-git-send-email-zhaoshenglong@huawei.com> X-Mailer: git-send-email 1.9.0.msysgit.0 In-Reply-To: <1435830563-3072-1-git-send-email-zhaoshenglong@huawei.com> References: <1435830563-3072-1-git-send-email-zhaoshenglong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.16.142] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x-2.6.x [generic] X-Received-From: 119.145.14.65 Cc: qemu-trivial@nongnu.org, mjt@tls.msk.ru, shannon.zhao@linaro.org Subject: [Qemu-devel] [PATCH 06/10] hw/arm/palm.c: Fix misusing qemu_allocate_irqs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: patch@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.170 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Shannon Zhao Use qemu_allocate_irq instead of qemu_allocate_irqs to fix memory leak. Signed-off-by: Shannon Zhao Signed-off-by: Shannon Zhao --- hw/arm/palm.c | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/hw/arm/palm.c b/hw/arm/palm.c index 7f1cfb8..f73c8a2 100644 --- a/hw/arm/palm.c +++ b/hw/arm/palm.c @@ -158,21 +158,25 @@ static void palmte_onoff_gpios(void *opaque, int line, int level) static void palmte_gpio_setup(struct omap_mpu_state_s *cpu) { - qemu_irq *misc_gpio; - omap_mmc_handlers(cpu->mmc, qdev_get_gpio_in(cpu->gpio, PALMTE_MMC_WP_GPIO), qemu_irq_invert(omap_mpuio_in_get(cpu->mpuio) [PALMTE_MMC_SWITCH_GPIO])); - misc_gpio = qemu_allocate_irqs(palmte_onoff_gpios, cpu, 7); - qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO, misc_gpio[0]); - qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO, misc_gpio[1]); - qdev_connect_gpio_out(cpu->gpio, 11, misc_gpio[2]); - qdev_connect_gpio_out(cpu->gpio, 12, misc_gpio[3]); - qdev_connect_gpio_out(cpu->gpio, 13, misc_gpio[4]); - omap_mpuio_out_set(cpu->mpuio, 1, misc_gpio[5]); - omap_mpuio_out_set(cpu->mpuio, 3, misc_gpio[6]); + qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO, + qemu_allocate_irq(palmte_onoff_gpios, cpu, 0)); + qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO, + qemu_allocate_irq(palmte_onoff_gpios, cpu, 1)); + qdev_connect_gpio_out(cpu->gpio, 11, + qemu_allocate_irq(palmte_onoff_gpios, cpu, 2)); + qdev_connect_gpio_out(cpu->gpio, 12, + qemu_allocate_irq(palmte_onoff_gpios, cpu, 3)); + qdev_connect_gpio_out(cpu->gpio, 13, + qemu_allocate_irq(palmte_onoff_gpios, cpu, 4)); + omap_mpuio_out_set(cpu->mpuio, 1, + qemu_allocate_irq(palmte_onoff_gpios, cpu, 5)); + omap_mpuio_out_set(cpu->mpuio, 3, + qemu_allocate_irq(palmte_onoff_gpios, cpu, 6)); /* Reset some inputs to initial state. */ qemu_irq_lower(qdev_get_gpio_in(cpu->gpio, PALMTE_USBDETECT_GPIO));