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X-Received-From: 2001:8b0:1d0::1 Subject: [Qemu-devel] [PULL 4/7] target-arm: A64: Print ELR when taking exceptions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.50 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Soren Brinkmann When taking an exception print the content of the exception link register. This is useful especially for synchronous exceptions because in that case this registers holds the address of the instruction that generated the exception. Signed-off-by: Soren Brinkmann Message-id: 1435036655-16132-1-git-send-email-soren.brinkmann@xilinx.com Signed-off-by: Peter Maydell --- target-arm/helper-a64.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c index e30af06..08c95a3 100644 --- a/target-arm/helper-a64.c +++ b/target-arm/helper-a64.c @@ -533,6 +533,8 @@ void aarch64_cpu_do_interrupt(CPUState *cs) env->condexec_bits = 0; } + qemu_log_mask(CPU_LOG_INT, "...with ELR 0x%" PRIx64 "\n", + env->elr_el[new_el]); pstate_write(env, PSTATE_DAIF | new_mode); env->aarch64 = 1;