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[209.85.212.178]) by mx.google.com with ESMTPS id u7si19147128wiw.120.2015.06.15.09.34.30 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 15 Jun 2015 09:34:31 -0700 (PDT) Received-SPF: pass (google.com: domain of eric.auger@linaro.org designates 209.85.212.178 as permitted sender) client-ip=209.85.212.178; Received: by wifx6 with SMTP id x6so84402735wif.0 for ; Mon, 15 Jun 2015 09:34:30 -0700 (PDT) X-Received: by 10.180.208.7 with SMTP id ma7mr33947331wic.0.1434386070878; Mon, 15 Jun 2015 09:34:30 -0700 (PDT) Received: from midway01-04-00.lavalab ([81.128.185.50]) by mx.google.com with ESMTPSA id bh7sm19677484wjb.8.2015.06.15.09.34.28 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 15 Jun 2015 09:34:29 -0700 (PDT) From: Eric Auger To: eric.auger@st.com, eric.auger@linaro.org, qemu-devel@nongnu.org, peter.maydell@linaro.org, peter.crosthwaite@xilinx.com, pbonzini@redhat.com, alex.williamson@redhat.com Cc: christoffer.dall@linaro.org, patches@linaro.org, b.reynal@virtualopensystems.com, vikrams@codeaurora.org Subject: [RESEND PATCH v16 4/6] intc: arm_gic_kvm: set the qemu_irq/gsi mapping Date: Mon, 15 Jun 2015 17:33:56 +0100 Message-Id: <1434386038-9246-5-git-send-email-eric.auger@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1434386038-9246-1-git-send-email-eric.auger@linaro.org> References: <1434386038-9246-1-git-send-email-eric.auger@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: eric.auger@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.175 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The arm_gic_kvm now calls kvm_irqchip_set_qemuirq_gsi to build the hash table storing qemu_irq/gsi mappings. From that point on irqfd can be setup directly from the qemu_irq using kvm_irqchip_add_irqfd_notifier. Signed-off-by: Eric Auger Tested-by: Vikram Sethi --- v15 -> v16: - added Vikram's T-b - Resolve rebase conflict v2 -> v3: - kvm_irqchip_add_qemuirq_irqfd_notifier renamed into kvm_irqchip_add_irqfd_notifier --- hw/intc/arm_gic_kvm.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c index 2cb7d25..f56bff1 100644 --- a/hw/intc/arm_gic_kvm.c +++ b/hw/intc/arm_gic_kvm.c @@ -570,6 +570,12 @@ static void kvm_arm_gic_realize(DeviceState *dev, Error **errp) */ i += (GIC_INTERNAL * s->num_cpu); qdev_init_gpio_in(dev, kvm_arm_gic_set_irq, i); + + for (i = 0; i < s->num_irq - GIC_INTERNAL; i++) { + qemu_irq irq = qdev_get_gpio_in(dev, i); + kvm_irqchip_set_qemuirq_gsi(kvm_state, irq, i); + } + /* We never use our outbound IRQ/FIQ lines but provide them so that * we maintain the same interface as the non-KVM GIC. */