From patchwork Fri May 29 13:10:12 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 49210 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wg0-f70.google.com (mail-wg0-f70.google.com [74.125.82.70]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id CB8D0218E7 for ; Fri, 29 May 2015 13:30:26 +0000 (UTC) Received: by wgla2 with SMTP id a2sf18437608wgl.1 for ; Fri, 29 May 2015 06:30:26 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:date :message-id:in-reply-to:references:subject:precedence:list-id :list-unsubscribe:list-archive:list-post:list-help:list-subscribe :errors-to:sender:x-original-sender :x-original-authentication-results:mailing-list; bh=MkQAhaVMSudKUGbJt4TFqFtl5pPR8j4Ub7yZ4Mv9X7s=; b=lfWPtqZKTS9t9/pp5rxopaamSWsDcloI4Z2L8Ya5hqK9LB/+ApBSSyyC9je1N7UiLw ZPS7Boa/vyQVANVkXglNNIOaNXIC328qMlONFfByAy2xHgFkpIvKAp88ozkiQmjCljBa WO3WodS6OfZy4n77lQXy1b1Vz4foAm9mpp6oIVBuEMhvWFStaGETqtG/BeQZoggvEP8b NsMLcCGYDn0JLVOODNKMvpJpBKuDCbH21LfeyW9cGWPORG50VAVu9ZEpR7h8r4u6PFuw vhgIS1lpNfCI6wXzkzkMpSmSe/V8lhA2VY9GMO9G9kBenxUNBWs/hrG+Do+asT6ZpCef nRwg== X-Gm-Message-State: ALoCoQn1wjPtMMdtQ7bnWVg25769XaFuoOb3XuR1b9QqULV3pS2NAiGvtCQ5yC1JwnEMEH1YnCCk X-Received: by 10.112.189.131 with SMTP id gi3mr7420660lbc.6.1432906225967; Fri, 29 May 2015 06:30:25 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.203.227 with SMTP id kt3ls294493lac.18.gmail; Fri, 29 May 2015 06:30:25 -0700 (PDT) X-Received: by 10.152.5.198 with SMTP id u6mr7892256lau.48.1432906225818; Fri, 29 May 2015 06:30:25 -0700 (PDT) Received: from mail-la0-f51.google.com (mail-la0-f51.google.com. [209.85.215.51]) by mx.google.com with ESMTPS id dc7si4678690lad.153.2015.05.29.06.30.25 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 29 May 2015 06:30:25 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.51 as permitted sender) client-ip=209.85.215.51; Received: by lagv1 with SMTP id v1so55755423lag.3 for ; Fri, 29 May 2015 06:30:25 -0700 (PDT) X-Received: by 10.152.36.161 with SMTP id r1mr7977536laj.88.1432906225708; Fri, 29 May 2015 06:30:25 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.108.230 with SMTP id hn6csp335440lbb; Fri, 29 May 2015 06:30:24 -0700 (PDT) X-Received: by 10.140.152.130 with SMTP id 124mr9993560qhy.65.1432906224031; Fri, 29 May 2015 06:30:24 -0700 (PDT) Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id b138si5553180qka.116.2015.05.29.06.30.23 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 29 May 2015 06:30:24 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:35938 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YyKMg-0007Vs-SJ for patch@linaro.org; Fri, 29 May 2015 09:30:22 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46479) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YyK42-00042b-JY for qemu-devel@nongnu.org; Fri, 29 May 2015 09:11:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YyK3z-0003cr-Ea for qemu-devel@nongnu.org; Fri, 29 May 2015 09:11:06 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:34304) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YyK3z-0003US-4b for qemu-devel@nongnu.org; Fri, 29 May 2015 09:11:03 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1YyK3h-0005m0-DW for qemu-devel@nongnu.org; Fri, 29 May 2015 14:10:45 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 29 May 2015 14:10:12 +0100 Message-Id: <1432905045-22138-7-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1432905045-22138-1-git-send-email-peter.maydell@linaro.org> References: <1432905045-22138-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Subject: [Qemu-devel] [PULL 06/39] target-arm: Make raise_exception() take syndrome and target EL X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.51 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Rather than making every caller of raise_exception set the syndrome and target EL by hand, make these arguments to raise_exception() and have that do the job. Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias --- target-arm/op_helper.c | 68 +++++++++++++++++++++----------------------------- 1 file changed, 28 insertions(+), 40 deletions(-) diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index 9ab7c61..a4507df 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -24,12 +24,15 @@ #define SIGNBIT (uint32_t)0x80000000 #define SIGNBIT64 ((uint64_t)1 << 63) -static void raise_exception(CPUARMState *env, int tt) +static void raise_exception(CPUARMState *env, uint32_t excp, + uint32_t syndrome, uint32_t target_el) { - ARMCPU *cpu = arm_env_get_cpu(env); - CPUState *cs = CPU(cpu); + CPUState *cs = CPU(arm_env_get_cpu(env)); - cs->exception_index = tt; + assert(!excp_is_internal(excp)); + cs->exception_index = excp; + env->exception.syndrome = syndrome; + env->exception.target_el = target_el; cpu_loop_exit(cs); } @@ -109,11 +112,9 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx, exc = EXCP_DATA_ABORT; } - env->exception.syndrome = syn; - env->exception.target_el = exception_target_el(env); env->exception.vaddress = addr; env->exception.fsr = ret; - raise_exception(env, exc); + raise_exception(env, exc, syn, exception_target_el(env)); } } #endif @@ -286,13 +287,7 @@ void HELPER(exception_internal)(CPUARMState *env, uint32_t excp) void HELPER(exception_with_syndrome)(CPUARMState *env, uint32_t excp, uint32_t syndrome, uint32_t target_el) { - CPUState *cs = CPU(arm_env_get_cpu(env)); - - assert(!excp_is_internal(excp)); - cs->exception_index = excp; - env->exception.syndrome = syndrome; - env->exception.target_el = target_el; - cpu_loop_exit(cs); + raise_exception(env, excp, syndrome, target_el); } uint32_t HELPER(cpsr_read)(CPUARMState *env) @@ -343,9 +338,7 @@ void HELPER(access_check_cp_reg)(CPUARMState *env, void *rip, uint32_t syndrome) if (arm_feature(env, ARM_FEATURE_XSCALE) && ri->cp < 14 && extract32(env->cp15.c15_cpar, ri->cp, 1) == 0) { - env->exception.syndrome = syndrome; - env->exception.target_el = exception_target_el(env); - raise_exception(env, EXCP_UDEF); + raise_exception(env, EXCP_UDEF, syndrome, exception_target_el(env)); } if (!ri->accessfn) { @@ -356,17 +349,15 @@ void HELPER(access_check_cp_reg)(CPUARMState *env, void *rip, uint32_t syndrome) case CP_ACCESS_OK: return; case CP_ACCESS_TRAP: - env->exception.syndrome = syndrome; - env->exception.target_el = exception_target_el(env); break; case CP_ACCESS_TRAP_UNCATEGORIZED: - env->exception.syndrome = syn_uncategorized(); - env->exception.target_el = exception_target_el(env); + syndrome = syn_uncategorized(); break; default: g_assert_not_reached(); } - raise_exception(env, EXCP_UDEF); + + raise_exception(env, EXCP_UDEF, syndrome, exception_target_el(env)); } void HELPER(set_cp_reg)(CPUARMState *env, void *rip, uint32_t value) @@ -404,11 +395,10 @@ void HELPER(msr_i_pstate)(CPUARMState *env, uint32_t op, uint32_t imm) * to catch that case at translate time. */ if (arm_current_el(env) == 0 && !(env->cp15.sctlr_el[1] & SCTLR_UMA)) { - env->exception.target_el = exception_target_el(env); - env->exception.syndrome = syn_aa64_sysregtrap(0, extract32(op, 0, 3), - extract32(op, 3, 3), 4, - imm, 0x1f, 0); - raise_exception(env, EXCP_UDEF); + uint32_t syndrome = syn_aa64_sysregtrap(0, extract32(op, 0, 3), + extract32(op, 3, 3), 4, + imm, 0x1f, 0); + raise_exception(env, EXCP_UDEF, syndrome, exception_target_el(env)); } switch (op) { @@ -466,9 +456,8 @@ void HELPER(pre_hvc)(CPUARMState *env) } if (undef) { - env->exception.syndrome = syn_uncategorized(); - env->exception.target_el = exception_target_el(env); - raise_exception(env, EXCP_UDEF); + raise_exception(env, EXCP_UDEF, syn_uncategorized(), + exception_target_el(env)); } } @@ -497,15 +486,12 @@ void HELPER(pre_smc)(CPUARMState *env, uint32_t syndrome) undef = true; } else if (!secure && cur_el == 1 && (env->cp15.hcr_el2 & HCR_TSC)) { /* In NS EL1, HCR controlled routing to EL2 has priority over SMD. */ - env->exception.syndrome = syndrome; - env->exception.target_el = 2; - raise_exception(env, EXCP_HYP_TRAP); + raise_exception(env, EXCP_HYP_TRAP, syndrome, 2); } if (undef) { - env->exception.syndrome = syn_uncategorized(); - env->exception.target_el = exception_target_el(env); - raise_exception(env, EXCP_UDEF); + raise_exception(env, EXCP_UDEF, syn_uncategorized(), + exception_target_el(env)); } } @@ -798,14 +784,15 @@ void arm_debug_excp_handler(CPUState *cs) bool wnr = (wp_hit->flags & BP_WATCHPOINT_HIT_WRITE) != 0; bool same_el = arm_debug_target_el(env) == arm_current_el(env); - env->exception.syndrome = syn_watchpoint(same_el, 0, wnr); if (extended_addresses_enabled(env)) { env->exception.fsr = (1 << 9) | 0x22; } else { env->exception.fsr = 0x2; } env->exception.vaddress = wp_hit->hitaddr; - raise_exception(env, EXCP_DATA_ABORT); + raise_exception(env, EXCP_DATA_ABORT, + syn_watchpoint(same_el, 0, wnr), + arm_debug_target_el(env)); } else { cpu_resume_from_signal(cs, NULL); } @@ -813,14 +800,15 @@ void arm_debug_excp_handler(CPUState *cs) } else { if (check_breakpoints(cpu)) { bool same_el = (arm_debug_target_el(env) == arm_current_el(env)); - env->exception.syndrome = syn_breakpoint(same_el); if (extended_addresses_enabled(env)) { env->exception.fsr = (1 << 9) | 0x22; } else { env->exception.fsr = 0x2; } /* FAR is UNKNOWN, so doesn't need setting */ - raise_exception(env, EXCP_PREFETCH_ABORT); + raise_exception(env, EXCP_PREFETCH_ABORT, + syn_breakpoint(same_el), + arm_debug_target_el(env)); } } }