From patchwork Fri May 29 13:10:29 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 49175 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-la0-f72.google.com (mail-la0-f72.google.com [209.85.215.72]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id D6176218E7 for ; Fri, 29 May 2015 13:12:26 +0000 (UTC) Received: by lani11 with SMTP id i11sf20514533lan.3 for ; Fri, 29 May 2015 06:12:25 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:from:to:date:message-id:in-reply-to :references:mime-version:content-type:content-transfer-encoding :subject:precedence:list-id:list-unsubscribe:list-archive:list-post :list-help:list-subscribe:errors-to:sender:x-original-sender :x-original-authentication-results:mailing-list; bh=1QW/GPLYgtst1S2VSbPbVmsVEF78KOfT8TsPRjHNKVs=; b=mGEZBM1PP8mRYdbnlLC9Zk4S0/DloTOggJRaCNN45OsBFY5oOORWisiGC/cLDWX/9B MsWPoHpPT3UNj7H6eYNHYKXynyIYEqdo4jN4i9llh6xVjdReHvpBYr+05ZnIZbgGJjE+ E6gSxegvRrxfyP96hhOkBHI/yEyJnGxVN1rHciswcyBKUbVHzX3vhot4UK9WMRVUK23M 7izjtZF08TPUus8w4wWerJcMraQ4bHPQ9TUgXS5Ka3HBu1RAmQ8W3AGscEAL4Oh7pxnr XlMW8DHPFybn60AFk7tM6goHTaQVgfW8VnlpnW3iSrb2I/4pGeAVIQCzPviP4MthbzEQ p6Cg== X-Gm-Message-State: ALoCoQn21IJYfZXu6k5cKmJf/d3OOivL89W/RYRy344gdBabLGxcdyz66OQHmCxwXBfLSptdGaUJ X-Received: by 10.194.175.36 with SMTP id bx4mr7233151wjc.1.1432905145477; Fri, 29 May 2015 06:12:25 -0700 (PDT) X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.182.228 with SMTP id eh4ls322245lac.45.gmail; Fri, 29 May 2015 06:12:25 -0700 (PDT) X-Received: by 10.112.72.2 with SMTP id z2mr7778478lbu.39.1432905145309; Fri, 29 May 2015 06:12:25 -0700 (PDT) Received: from mail-la0-f53.google.com (mail-la0-f53.google.com. [209.85.215.53]) by mx.google.com with ESMTPS id dz10si4677292lac.34.2015.05.29.06.12.25 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 29 May 2015 06:12:25 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.53 as permitted sender) client-ip=209.85.215.53; Received: by laat2 with SMTP id t2so55388400laa.1 for ; Fri, 29 May 2015 06:12:25 -0700 (PDT) X-Received: by 10.112.140.231 with SMTP id rj7mr7834174lbb.76.1432905145059; Fri, 29 May 2015 06:12:25 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.108.230 with SMTP id hn6csp321219lbb; Fri, 29 May 2015 06:12:23 -0700 (PDT) X-Received: by 10.55.41.147 with SMTP id p19mr15745876qkp.78.1432905143146; Fri, 29 May 2015 06:12:23 -0700 (PDT) Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id em4si5572697qcb.5.2015.05.29.06.12.22 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Fri, 29 May 2015 06:12:23 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:35752 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YyK5G-0005Xu-2M for patch@linaro.org; Fri, 29 May 2015 09:12:22 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46230) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YyK3w-0003t3-Ks for qemu-devel@nongnu.org; Fri, 29 May 2015 09:11:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YyK3t-0003YY-LP for qemu-devel@nongnu.org; Fri, 29 May 2015 09:11:00 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:34304) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YyK3t-0003US-Bx for qemu-devel@nongnu.org; Fri, 29 May 2015 09:10:57 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1YyK3i-0005nN-Dl for qemu-devel@nongnu.org; Fri, 29 May 2015 14:10:46 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 29 May 2015 14:10:29 +0100 Message-Id: <1432905045-22138-24-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1432905045-22138-1-git-send-email-peter.maydell@linaro.org> References: <1432905045-22138-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Subject: [Qemu-devel] [PULL 23/39] hw/arm/virt-acpi-build: Generate MADT table X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.53 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Shannon Zhao MADT describes GIC enabled ARM platforms. The GICC and GICD subtables are used to define the GIC regions. Signed-off-by: Shannon Zhao Signed-off-by: Shannon Zhao Reviewed-by: Alex Bennée Message-id: 1432522520-8068-10-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell --- hw/arm/virt-acpi-build.c | 57 ++++++++++++++++++++++++++++++++++++++++ include/hw/acpi/acpi-defs.h | 38 ++++++++++++++++++++++++++- include/hw/arm/virt-acpi-build.h | 3 +++ 3 files changed, 97 insertions(+), 1 deletion(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 0791501..29ad535 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -42,6 +42,20 @@ #define ARM_SPI_BASE 32 +typedef struct VirtAcpiCpuInfo { + DECLARE_BITMAP(found_cpus, VIRT_ACPI_CPU_ID_LIMIT); +} VirtAcpiCpuInfo; + +static void virt_acpi_get_cpu_info(VirtAcpiCpuInfo *cpuinfo) +{ + CPUState *cpu; + + memset(cpuinfo->found_cpus, 0, sizeof cpuinfo->found_cpus); + CPU_FOREACH(cpu) { + set_bit(cpu->cpu_index, cpuinfo->found_cpus); + } +} + static void acpi_dsdt_add_cpus(Aml *scope, int smp_cpus) { uint16_t i; @@ -137,6 +151,43 @@ static void acpi_dsdt_add_virtio(Aml *scope, } } +/* MADT */ +static void +build_madt(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info, + VirtAcpiCpuInfo *cpuinfo) +{ + int madt_start = table_data->len; + const MemMapEntry *memmap = guest_info->memmap; + AcpiMultipleApicTable *madt; + AcpiMadtGenericDistributor *gicd; + int i; + + madt = acpi_data_push(table_data, sizeof *madt); + + for (i = 0; i < guest_info->smp_cpus; i++) { + AcpiMadtGenericInterrupt *gicc = acpi_data_push(table_data, + sizeof *gicc); + gicc->type = ACPI_APIC_GENERIC_INTERRUPT; + gicc->length = sizeof(*gicc); + gicc->base_address = memmap[VIRT_GIC_CPU].base; + gicc->cpu_interface_number = i; + gicc->arm_mpidr = i; + gicc->uid = i; + if (test_bit(i, cpuinfo->found_cpus)) { + gicc->flags = cpu_to_le32(ACPI_GICC_ENABLED); + } + } + + gicd = acpi_data_push(table_data, sizeof *gicd); + gicd->type = ACPI_APIC_GENERIC_DISTRIBUTOR; + gicd->length = sizeof(*gicd); + gicd->base_address = memmap[VIRT_GIC_DIST].base; + + build_header(linker, table_data, + (void *)(table_data->data + madt_start), "APIC", + table_data->len - madt_start, 5); +} + /* FADT */ static void build_fadt(GArray *table_data, GArray *linker, unsigned dsdt) @@ -209,8 +260,11 @@ void virt_acpi_build(VirtGuestInfo *guest_info, AcpiBuildTables *tables) { GArray *table_offsets; unsigned dsdt; + VirtAcpiCpuInfo cpuinfo; GArray *tables_blob = tables->table_data; + virt_acpi_get_cpu_info(&cpuinfo); + table_offsets = g_array_new(false, true /* clear */, sizeof(uint32_t)); @@ -235,6 +289,9 @@ void virt_acpi_build(VirtGuestInfo *guest_info, AcpiBuildTables *tables) acpi_add_table(table_offsets, tables_blob); build_fadt(tables_blob, tables->linker, dsdt); + acpi_add_table(table_offsets, tables_blob); + build_madt(tables_blob, tables->linker, guest_info, &cpuinfo); + /* Cleanup memory that's no longer used. */ g_array_free(table_offsets, true); } diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h index fadcf84..1e9dbe7 100644 --- a/include/hw/acpi/acpi-defs.h +++ b/include/hw/acpi/acpi-defs.h @@ -256,7 +256,13 @@ typedef struct AcpiMultipleApicTable AcpiMultipleApicTable; #define ACPI_APIC_IO_SAPIC 6 #define ACPI_APIC_LOCAL_SAPIC 7 #define ACPI_APIC_XRUPT_SOURCE 8 -#define ACPI_APIC_RESERVED 9 /* 9 and greater are reserved */ +#define ACPI_APIC_LOCAL_X2APIC 9 +#define ACPI_APIC_LOCAL_X2APIC_NMI 10 +#define ACPI_APIC_GENERIC_INTERRUPT 11 +#define ACPI_APIC_GENERIC_DISTRIBUTOR 12 +#define ACPI_APIC_GENERIC_MSI_FRAME 13 +#define ACPI_APIC_GENERIC_REDISTRIBUTOR 14 +#define ACPI_APIC_RESERVED 15 /* 15 and greater are reserved */ /* * MADT sub-structures (Follow MULTIPLE_APIC_DESCRIPTION_TABLE) @@ -304,6 +310,36 @@ struct AcpiMadtLocalNmi { } QEMU_PACKED; typedef struct AcpiMadtLocalNmi AcpiMadtLocalNmi; +struct AcpiMadtGenericInterrupt { + ACPI_SUB_HEADER_DEF + uint16_t reserved; + uint32_t cpu_interface_number; + uint32_t uid; + uint32_t flags; + uint32_t parking_version; + uint32_t performance_interrupt; + uint64_t parked_address; + uint64_t base_address; + uint64_t gicv_base_address; + uint64_t gich_base_address; + uint32_t vgic_interrupt; + uint64_t gicr_base_address; + uint64_t arm_mpidr; +} QEMU_PACKED; + +typedef struct AcpiMadtGenericInterrupt AcpiMadtGenericInterrupt; + +struct AcpiMadtGenericDistributor { + ACPI_SUB_HEADER_DEF + uint16_t reserved; + uint32_t gic_id; + uint64_t base_address; + uint32_t global_irq_base; + uint32_t reserved2; +} QEMU_PACKED; + +typedef struct AcpiMadtGenericDistributor AcpiMadtGenericDistributor; + /* * HPET Description Table */ diff --git a/include/hw/arm/virt-acpi-build.h b/include/hw/arm/virt-acpi-build.h index ff00121..04f174d 100644 --- a/include/hw/arm/virt-acpi-build.h +++ b/include/hw/arm/virt-acpi-build.h @@ -23,6 +23,9 @@ #include "qemu-common.h" #include "hw/arm/virt.h" +#define VIRT_ACPI_CPU_ID_LIMIT 8 +#define ACPI_GICC_ENABLED 1 + typedef struct VirtGuestInfo { int smp_cpus; FWCfgState *fw_cfg;