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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id k6si10131589qkh.32.2015.05.24.20.03.01 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Sun, 24 May 2015 20:03:02 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:41673 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YwifN-0006kH-Jw for patch@linaro.org; Sun, 24 May 2015 23:03:01 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48002) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YwiZV-0003kw-81 for qemu-devel@nongnu.org; Sun, 24 May 2015 22:57:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YwiZQ-0000mK-UD for qemu-devel@nongnu.org; Sun, 24 May 2015 22:56:57 -0400 Received: from szxga02-in.huawei.com ([119.145.14.65]:62008) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YwiZQ-0000k8-Ct for qemu-devel@nongnu.org; Sun, 24 May 2015 22:56:52 -0400 Received: from 172.24.2.119 (EHLO szxeml428-hub.china.huawei.com) ([172.24.2.119]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id CLV56139; Mon, 25 May 2015 10:56:32 +0800 (CST) Received: from HGHY1Z002260041.china.huawei.com (10.177.16.142) by szxeml428-hub.china.huawei.com (10.82.67.183) with Microsoft SMTP Server id 14.3.158.1; Mon, 25 May 2015 10:56:20 +0800 From: Shannon Zhao To: , , , , , , , , , , Date: Mon, 25 May 2015 10:55:09 +0800 Message-ID: <1432522520-8068-14-git-send-email-zhaoshenglong@huawei.com> X-Mailer: git-send-email 1.9.0.msysgit.0 In-Reply-To: <1432522520-8068-1-git-send-email-zhaoshenglong@huawei.com> References: <1432522520-8068-1-git-send-email-zhaoshenglong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.16.142] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x-2.6.x [generic] X-Received-From: 119.145.14.65 Cc: hangaohuai@huawei.com, zhaoshenglong@huawei.com, peter.huangpeng@huawei.com, shannon.zhao@linaro.org Subject: [Qemu-devel] [PATCH v9 13/24] hw/arm/virt-acpi-build: Generate MCFG table X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: patch@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.49 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Shannon Zhao Generate MCFG table for PCIe controller. Signed-off-by: Shannon Zhao Signed-off-by: Shannon Zhao Reviewed-by: Alex Bennée --- hw/arm/virt-acpi-build.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index f8c1dd8..95c83ee 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -39,6 +39,7 @@ #include "hw/loader.h" #include "hw/hw.h" #include "hw/acpi/aml-build.h" +#include "hw/pci/pcie_host.h" #define ARM_SPI_BASE 32 @@ -180,6 +181,25 @@ build_rsdp(GArray *rsdp_table, GArray *linker, unsigned rsdt) return rsdp_table; } +static void +build_mcfg(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info) +{ + AcpiTableMcfg *mcfg; + const MemMapEntry *memmap = guest_info->memmap; + int len = sizeof(*mcfg) + sizeof(mcfg->allocation[0]); + + mcfg = acpi_data_push(table_data, len); + mcfg->allocation[0].address = cpu_to_le64(memmap[VIRT_PCIE_ECAM].base); + + /* Only a single allocation so no need to play with segments */ + mcfg->allocation[0].pci_segment = cpu_to_le16(0); + mcfg->allocation[0].start_bus_number = 0; + mcfg->allocation[0].end_bus_number = (memmap[VIRT_PCIE_ECAM].size + / PCIE_MMCFG_SIZE_MIN) - 1; + + build_header(linker, table_data, (void *)mcfg, "MCFG", len, 5); +} + /* GTDT */ static void build_gtdt(GArray *table_data, GArray *linker) @@ -350,6 +370,9 @@ void virt_acpi_build(VirtGuestInfo *guest_info, AcpiBuildTables *tables) acpi_add_table(table_offsets, tables_blob); build_gtdt(tables_blob, tables->linker); + acpi_add_table(table_offsets, tables_blob); + build_mcfg(tables_blob, tables->linker, guest_info); + /* RSDT is pointed to by RSDP */ rsdt = tables_blob->len; build_rsdt(tables_blob, tables->linker, table_offsets);