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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id u5si10082100qgu.115.2015.05.24.20.08.16 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Sun, 24 May 2015 20:08:16 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:41727 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YwikR-0007c4-Tt for patch@linaro.org; Sun, 24 May 2015 23:08:15 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48822) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ywicd-0001qg-6U for qemu-devel@nongnu.org; Sun, 24 May 2015 23:00:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YwicZ-0001rT-CF for qemu-devel@nongnu.org; Sun, 24 May 2015 23:00:11 -0400 Received: from szxga01-in.huawei.com ([58.251.152.64]:60906) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YwicY-0001jF-HG for qemu-devel@nongnu.org; Sun, 24 May 2015 23:00:07 -0400 Received: from 172.24.2.119 (EHLO szxeml428-hub.china.huawei.com) ([172.24.2.119]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id COJ09164; Mon, 25 May 2015 10:56:27 +0800 (CST) Received: from HGHY1Z002260041.china.huawei.com (10.177.16.142) by szxeml428-hub.china.huawei.com (10.82.67.183) with Microsoft SMTP Server id 14.3.158.1; Mon, 25 May 2015 10:56:15 +0800 From: Shannon Zhao To: , , , , , , , , , , Date: Mon, 25 May 2015 10:55:06 +0800 Message-ID: <1432522520-8068-11-git-send-email-zhaoshenglong@huawei.com> X-Mailer: git-send-email 1.9.0.msysgit.0 In-Reply-To: <1432522520-8068-1-git-send-email-zhaoshenglong@huawei.com> References: <1432522520-8068-1-git-send-email-zhaoshenglong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.16.142] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x-2.6.x [generic] X-Received-From: 58.251.152.64 Cc: hangaohuai@huawei.com, zhaoshenglong@huawei.com, peter.huangpeng@huawei.com, shannon.zhao@linaro.org Subject: [Qemu-devel] [PATCH v9 10/24] hw/arm/virt-acpi-build: Generate GTDT table X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: patch@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.54 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Shannon Zhao ACPI v5.1 defines GTDT for ARM devices as a place to describe timer related information in the system. The Arch Timer interrupts must be provided for GTDT. Signed-off-by: Shannon Zhao Signed-off-by: Shannon Zhao Reviewed-by: Alex Bennée --- hw/arm/virt-acpi-build.c | 29 +++++++++++++++++++++++++++++ hw/arm/virt.c | 8 ++++---- include/hw/acpi/acpi-defs.h | 37 +++++++++++++++++++++++++++++++++++++ include/hw/arm/virt.h | 5 +++++ 4 files changed, 75 insertions(+), 4 deletions(-) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 29ad535..90587ad 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -151,6 +151,32 @@ static void acpi_dsdt_add_virtio(Aml *scope, } } +/* GTDT */ +static void +build_gtdt(GArray *table_data, GArray *linker) +{ + int gtdt_start = table_data->len; + AcpiGenericTimerTable *gtdt; + + gtdt = acpi_data_push(table_data, sizeof *gtdt); + /* The interrupt values are the same with the device tree when adding 16 */ + gtdt->secure_el1_interrupt = ARCH_TIMER_S_EL1_IRQ + 16; + gtdt->secure_el1_flags = ACPI_EDGE_SENSITIVE; + + gtdt->non_secure_el1_interrupt = ARCH_TIMER_NS_EL1_IRQ + 16; + gtdt->non_secure_el1_flags = ACPI_EDGE_SENSITIVE; + + gtdt->virtual_timer_interrupt = ARCH_TIMER_VIRT_IRQ + 16; + gtdt->virtual_timer_flags = ACPI_EDGE_SENSITIVE; + + gtdt->non_secure_el2_interrupt = ARCH_TIMER_NS_EL2_IRQ + 16; + gtdt->non_secure_el2_flags = ACPI_EDGE_SENSITIVE; + + build_header(linker, table_data, + (void *)(table_data->data + gtdt_start), "GTDT", + table_data->len - gtdt_start, 5); +} + /* MADT */ static void build_madt(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info, @@ -292,6 +318,9 @@ void virt_acpi_build(VirtGuestInfo *guest_info, AcpiBuildTables *tables) acpi_add_table(table_offsets, tables_blob); build_madt(tables_blob, tables->linker, guest_info, &cpuinfo); + acpi_add_table(table_offsets, tables_blob); + build_gtdt(tables_blob, tables->linker); + /* Cleanup memory that's no longer used. */ g_array_free(table_offsets, true); } diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 250b9bc..a6a399d 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -265,10 +265,10 @@ static void fdt_add_timer_nodes(const VirtBoardInfo *vbi) "arm,armv7-timer"); } qemu_fdt_setprop_cells(vbi->fdt, "/timer", "interrupts", - GIC_FDT_IRQ_TYPE_PPI, 13, irqflags, - GIC_FDT_IRQ_TYPE_PPI, 14, irqflags, - GIC_FDT_IRQ_TYPE_PPI, 11, irqflags, - GIC_FDT_IRQ_TYPE_PPI, 10, irqflags); + GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_S_EL1_IRQ, irqflags, + GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_NS_EL1_IRQ, irqflags, + GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_VIRT_IRQ, irqflags, + GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_NS_EL2_IRQ, irqflags); } static void fdt_add_cpu_nodes(const VirtBoardInfo *vbi) diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h index 1e9dbe7..f503ec4 100644 --- a/include/hw/acpi/acpi-defs.h +++ b/include/hw/acpi/acpi-defs.h @@ -341,6 +341,43 @@ struct AcpiMadtGenericDistributor { typedef struct AcpiMadtGenericDistributor AcpiMadtGenericDistributor; /* + * Generic Timer Description Table (GTDT) + */ + +#define ACPI_GTDT_INTERRUPT_MODE (1 << 0) +#define ACPI_GTDT_INTERRUPT_POLARITY (1 << 1) +#define ACPI_GTDT_ALWAYS_ON (1 << 2) + +/* Triggering */ + +#define ACPI_LEVEL_SENSITIVE ((uint8_t) 0x00) +#define ACPI_EDGE_SENSITIVE ((uint8_t) 0x01) + +/* Polarity */ + +#define ACPI_ACTIVE_HIGH ((uint8_t) 0x00) +#define ACPI_ACTIVE_LOW ((uint8_t) 0x01) +#define ACPI_ACTIVE_BOTH ((uint8_t) 0x02) + +struct AcpiGenericTimerTable { + ACPI_TABLE_HEADER_DEF + uint64_t counter_block_addresss; + uint32_t reserved; + uint32_t secure_el1_interrupt; + uint32_t secure_el1_flags; + uint32_t non_secure_el1_interrupt; + uint32_t non_secure_el1_flags; + uint32_t virtual_timer_interrupt; + uint32_t virtual_timer_flags; + uint32_t non_secure_el2_interrupt; + uint32_t non_secure_el2_flags; + uint64_t counter_read_block_address; + uint32_t platform_timer_count; + uint32_t platform_timer_offset; +} QEMU_PACKED; +typedef struct AcpiGenericTimerTable AcpiGenericTimerTable; + +/* * HPET Description Table */ struct Acpi20Hpet { diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 49a85cc..ceec8b3 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -34,6 +34,11 @@ #define NUM_VIRTIO_TRANSPORTS 32 +#define ARCH_TIMER_VIRT_IRQ 11 +#define ARCH_TIMER_S_EL1_IRQ 13 +#define ARCH_TIMER_NS_EL1_IRQ 14 +#define ARCH_TIMER_NS_EL2_IRQ 10 + enum { VIRT_FLASH, VIRT_MEM,