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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id c7si6249009qcf.43.2015.05.20.19.33.17 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Wed, 20 May 2015 19:33:18 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:54572 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YvGIP-0004W4-KJ for patch@linaro.org; Wed, 20 May 2015 22:33:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45785) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YvGFb-0008Mm-O4 for qemu-devel@nongnu.org; Wed, 20 May 2015 22:30:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YvGFX-00058X-N4 for qemu-devel@nongnu.org; Wed, 20 May 2015 22:30:23 -0400 Received: from szxga01-in.huawei.com ([58.251.152.64]:35862) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YvGFX-00057g-1L for qemu-devel@nongnu.org; Wed, 20 May 2015 22:30:19 -0400 Received: from 172.24.2.119 (EHLO szxeml434-hub.china.huawei.com) ([172.24.2.119]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id COD16412; Thu, 21 May 2015 10:30:06 +0800 (CST) Received: from HGHY1Z002260041.china.huawei.com (10.177.16.142) by szxeml434-hub.china.huawei.com (10.82.67.225) with Microsoft SMTP Server id 14.3.158.1; Thu, 21 May 2015 10:29:57 +0800 From: Shannon Zhao To: , , , , , , , , , , Date: Thu, 21 May 2015 10:28:30 +0800 Message-ID: <1432175331-12548-4-git-send-email-zhaoshenglong@huawei.com> X-Mailer: git-send-email 1.9.0.msysgit.0 In-Reply-To: <1432175331-12548-1-git-send-email-zhaoshenglong@huawei.com> References: <1432175331-12548-1-git-send-email-zhaoshenglong@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.16.142] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.4.x-2.6.x [generic] X-Received-From: 58.251.152.64 Cc: hangaohuai@huawei.com, zhaoshenglong@huawei.com, peter.huangpeng@huawei.com, shannon.zhao@linaro.org Subject: [Qemu-devel] [PATCH v8 03/24] hw/arm/virt: Record PCIe ranges in MemMapEntry array X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: patch@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.172 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Shannon Zhao To generate ACPI table for PCIe controller, we need the base and size of the PCIe ranges. Record these ranges in MemMapEntry array, then we could share and use them for generating ACPI table. Signed-off-by: Shannon Zhao Signed-off-by: Shannon Zhao --- hw/arm/virt.c | 37 +++++++++++++------------------------ include/hw/arm/virt.h | 3 +++ 2 files changed, 16 insertions(+), 24 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 8959d0c..250b9bc 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -112,14 +112,9 @@ static const MemMapEntry a15memmap[] = { [VIRT_FW_CFG] = { 0x09020000, 0x0000000a }, [VIRT_MMIO] = { 0x0a000000, 0x00000200 }, /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */ - /* - * PCIE verbose map: - * - * MMIO window { 0x10000000, 0x2eff0000 }, - * PIO window { 0x3eff0000, 0x00010000 }, - * ECAM { 0x3f000000, 0x01000000 }, - */ - [VIRT_PCIE] = { 0x10000000, 0x30000000 }, + [VIRT_PCIE_MMIO] = { 0x10000000, 0x2eff0000 }, + [VIRT_PCIE_PIO] = { 0x3eff0000, 0x00010000 }, + [VIRT_PCIE_ECAM] = { 0x3f000000, 0x01000000 }, [VIRT_MEM] = { 0x40000000, 30ULL * 1024 * 1024 * 1024 }, }; @@ -625,16 +620,14 @@ static void create_pcie_irq_map(const VirtBoardInfo *vbi, uint32_t gic_phandle, static void create_pcie(const VirtBoardInfo *vbi, qemu_irq *pic, uint32_t gic_phandle) { - hwaddr base = vbi->memmap[VIRT_PCIE].base; - hwaddr size = vbi->memmap[VIRT_PCIE].size; - hwaddr end = base + size; - hwaddr size_mmio; - hwaddr size_ioport = 64 * 1024; - int nr_pcie_buses = 16; - hwaddr size_ecam = PCIE_MMCFG_SIZE_MIN * nr_pcie_buses; - hwaddr base_mmio = base; - hwaddr base_ioport; - hwaddr base_ecam; + hwaddr base_mmio = vbi->memmap[VIRT_PCIE_MMIO].base; + hwaddr size_mmio = vbi->memmap[VIRT_PCIE_MMIO].size; + hwaddr base_pio = vbi->memmap[VIRT_PCIE_PIO].base; + hwaddr size_pio = vbi->memmap[VIRT_PCIE_PIO].size; + hwaddr base_ecam = vbi->memmap[VIRT_PCIE_ECAM].base; + hwaddr size_ecam = vbi->memmap[VIRT_PCIE_ECAM].size; + hwaddr base = base_mmio; + int nr_pcie_buses = size_ecam / PCIE_MMCFG_SIZE_MIN; int irq = vbi->irqmap[VIRT_PCIE]; MemoryRegion *mmio_alias; MemoryRegion *mmio_reg; @@ -644,10 +637,6 @@ static void create_pcie(const VirtBoardInfo *vbi, qemu_irq *pic, char *nodename; int i; - base_ecam = QEMU_ALIGN_DOWN(end - size_ecam, size_ecam); - base_ioport = QEMU_ALIGN_DOWN(base_ecam - size_ioport, size_ioport); - size_mmio = base_ioport - base; - dev = qdev_create(NULL, TYPE_GPEX_HOST); qdev_init_nofail(dev); @@ -670,7 +659,7 @@ static void create_pcie(const VirtBoardInfo *vbi, qemu_irq *pic, memory_region_add_subregion(get_system_memory(), base_mmio, mmio_alias); /* Map IO port space */ - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, base_ioport); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, base_pio); for (i = 0; i < GPEX_NUM_IRQS; i++) { sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, pic[irq + i]); @@ -690,7 +679,7 @@ static void create_pcie(const VirtBoardInfo *vbi, qemu_irq *pic, 2, base_ecam, 2, size_ecam); qemu_fdt_setprop_sized_cells(vbi->fdt, nodename, "ranges", 1, FDT_PCI_RANGE_IOPORT, 2, 0, - 2, base_ioport, 2, size_ioport, + 2, base_pio, 2, size_pio, 1, FDT_PCI_RANGE_MMIO, 2, base_mmio, 2, base_mmio, 2, size_mmio); diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 2fe0d2e..49a85cc 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -45,6 +45,9 @@ enum { VIRT_RTC, VIRT_FW_CFG, VIRT_PCIE, + VIRT_PCIE_MMIO, + VIRT_PCIE_PIO, + VIRT_PCIE_ECAM, }; typedef struct MemMapEntry {