From patchwork Mon May 18 19:15:10 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 48711 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wg0-f71.google.com (mail-wg0-f71.google.com [74.125.82.71]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 4243B21411 for ; Mon, 18 May 2015 19:20:48 +0000 (UTC) Received: by wgtl5 with SMTP id l5sf57466841wgt.1 for ; Mon, 18 May 2015 12:20:47 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:date :message-id:in-reply-to:references:subject:precedence:list-id :list-unsubscribe:list-archive:list-post:list-help:list-subscribe :errors-to:sender:x-original-sender :x-original-authentication-results:mailing-list; bh=duaSA1h1IdpmaVlvnpg+H17lFNlxNLCxiPchnPfwwu4=; b=TTQ5/lz2p2lpx/KO+QNbMNJ3zaqecMbEuTDwz4EB5bE/VaKgX2a5AW0975OFywSHMz buIzvB/xBBJrvqX0de0lfgnY1ZOqjphHOjzvtJiW5drAOTgZIxVGWeF14f/ArEq9sv9/ Qv8k8853QMKhi76gpTJRS8MlYtJuT5eFwly6rzjK7geIRryfv3MDZb20cSmvjnAWyc4g bpBeEVOdDIHr5NtjWyZhqP4u2/VPsPN+N/HKtEZzwXHFVlT2CgUrPh/6duvcjLgkGjLN 0/5scd9Hwl6Gb3dWc6aZx/PuG6eWhmMUCPiNlTM8p5HptgDHyw9BedioSOvdwqIfzHPZ sS6w== X-Gm-Message-State: ALoCoQmtJhb5HpFwZiNOPao9nkDpWprvo7JLvvHXy+wzuCgBQDtqNzf7omtNNFHo/K9kDVDK68Mi X-Received: by 10.180.83.72 with SMTP id o8mr10921580wiy.3.1431976847614; Mon, 18 May 2015 12:20:47 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.206.98 with SMTP id ln2ls790326lac.61.gmail; Mon, 18 May 2015 12:20:47 -0700 (PDT) X-Received: by 10.112.162.38 with SMTP id xx6mr15239554lbb.110.1431976847385; Mon, 18 May 2015 12:20:47 -0700 (PDT) Received: from mail-la0-f50.google.com (mail-la0-f50.google.com. [209.85.215.50]) by mx.google.com with ESMTPS id z6si3066706lbo.124.2015.05.18.12.20.47 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 18 May 2015 12:20:47 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.50 as permitted sender) client-ip=209.85.215.50; Received: by lagv1 with SMTP id v1so234516443lag.3 for ; Mon, 18 May 2015 12:20:47 -0700 (PDT) X-Received: by 10.112.163.168 with SMTP id yj8mr18523217lbb.36.1431976847290; Mon, 18 May 2015 12:20:47 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.108.230 with SMTP id hn6csp282534lbb; Mon, 18 May 2015 12:20:45 -0700 (PDT) X-Received: by 10.140.233.214 with SMTP id e205mr32876828qhc.68.1431976840748; Mon, 18 May 2015 12:20:40 -0700 (PDT) Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id k69si19855qgk.87.2015.05.18.12.20.39 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 18 May 2015 12:20:40 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:42674 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YuQad-0001Xu-Ca for patch@linaro.org; Mon, 18 May 2015 15:20:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42451) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YuQVm-0001bC-1G for qemu-devel@nongnu.org; Mon, 18 May 2015 15:15:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YuQVj-000091-Vk for qemu-devel@nongnu.org; Mon, 18 May 2015 15:15:37 -0400 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:34173) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YuQVj-0008QT-JG for qemu-devel@nongnu.org; Mon, 18 May 2015 15:15:35 -0400 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1YuQVV-0007uo-Ln for qemu-devel@nongnu.org; Mon, 18 May 2015 20:15:21 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 18 May 2015 20:15:10 +0100 Message-Id: <1431976521-30352-11-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1431976521-30352-1-git-send-email-peter.maydell@linaro.org> References: <1431976521-30352-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Subject: [Qemu-devel] [PULL 10/21] char: cadence_uart: Split state struct and type into header X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.50 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Peter Crosthwaite Create a new header for Cadence UART to allow using the device with modern SoC programming conventions. The state struct needs to be visible to embed the device in SoC containers. Reviewed-by: Alistair Francis Reviewed-by: Peter Maydell Reviewed-by: Edgar E. Iglesias Tested-by: Alistair Francis Signed-off-by: Peter Crosthwaite Message-id: 46a0fbd45b6b205f54c4a8c778deb75c77f8abdf.1431381507.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell --- hw/char/cadence_uart.c | 29 +---------------------- include/hw/char/cadence_uart.h | 53 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 54 insertions(+), 28 deletions(-) create mode 100644 include/hw/char/cadence_uart.h diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c index 4a4d3eb..9d379e5 100644 --- a/hw/char/cadence_uart.c +++ b/hw/char/cadence_uart.c @@ -16,9 +16,7 @@ * with this program; if not, see . */ -#include "hw/sysbus.h" -#include "sysemu/char.h" -#include "qemu/timer.h" +#include "hw/char/cadence_uart.h" #ifdef CADENCE_UART_ERR_DEBUG #define DB_PRINT(...) do { \ @@ -85,8 +83,6 @@ #define LOCAL_LOOPBACK (0x2 << UART_MR_CHMODE_SH) #define REMOTE_LOOPBACK (0x3 << UART_MR_CHMODE_SH) -#define CADENCE_UART_RX_FIFO_SIZE 16 -#define CADENCE_UART_TX_FIFO_SIZE 16 #define UART_INPUT_CLK 50000000 #define R_CR (0x00/4) @@ -108,29 +104,6 @@ #define R_PWID (0x40/4) #define R_TTRIG (0x44/4) -#define CADENCE_UART_R_MAX (0x48/4) - -#define TYPE_CADENCE_UART "cadence_uart" -#define CADENCE_UART(obj) OBJECT_CHECK(CadenceUARTState, (obj), \ - TYPE_CADENCE_UART) - -typedef struct { - /*< private >*/ - SysBusDevice parent_obj; - /*< public >*/ - - MemoryRegion iomem; - uint32_t r[CADENCE_UART_R_MAX]; - uint8_t rx_fifo[CADENCE_UART_RX_FIFO_SIZE]; - uint8_t tx_fifo[CADENCE_UART_TX_FIFO_SIZE]; - uint32_t rx_wpos; - uint32_t rx_count; - uint32_t tx_count; - uint64_t char_tx_time; - CharDriverState *chr; - qemu_irq irq; - QEMUTimer *fifo_trigger_handle; -} CadenceUARTState; static void uart_update_status(CadenceUARTState *s) { diff --git a/include/hw/char/cadence_uart.h b/include/hw/char/cadence_uart.h new file mode 100644 index 0000000..6310f52 --- /dev/null +++ b/include/hw/char/cadence_uart.h @@ -0,0 +1,53 @@ +/* + * Device model for Cadence UART + * + * Copyright (c) 2010 Xilinx Inc. + * Copyright (c) 2012 Peter A.G. Crosthwaite (peter.crosthwaite@petalogix.com) + * Copyright (c) 2012 PetaLogix Pty Ltd. + * Written by Haibing Ma + * M.Habib + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, see . + */ + +#ifndef CADENCE_UART_H + +#include "hw/sysbus.h" +#include "sysemu/char.h" +#include "qemu/timer.h" + +#define CADENCE_UART_RX_FIFO_SIZE 16 +#define CADENCE_UART_TX_FIFO_SIZE 16 + +#define CADENCE_UART_R_MAX (0x48/4) + +#define TYPE_CADENCE_UART "cadence_uart" +#define CADENCE_UART(obj) OBJECT_CHECK(CadenceUARTState, (obj), \ + TYPE_CADENCE_UART) + +typedef struct { + /*< private >*/ + SysBusDevice parent_obj; + + /*< public >*/ + MemoryRegion iomem; + uint32_t r[CADENCE_UART_R_MAX]; + uint8_t rx_fifo[CADENCE_UART_RX_FIFO_SIZE]; + uint8_t tx_fifo[CADENCE_UART_TX_FIFO_SIZE]; + uint32_t rx_wpos; + uint32_t rx_count; + uint32_t tx_count; + uint64_t char_tx_time; + CharDriverState *chr; + qemu_irq irq; + QEMUTimer *fifo_trigger_handle; +} CadenceUARTState; + +#define CADENCE_UART_H +#endif