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X-Received-From: 2001:8b0:1d0::1 Subject: [Qemu-devel] [PULL 07/19] hw/intc/arm_gic_kvm.c: Save and restore GICD_IGROUPRn state X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.53 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Now that the GIC base class has state fields for the GICD_IGROUPRn registers, make kvm_arm_gic_get() and kvm_arm_gic_put() write and read them. This allows us to remove the check that made us fail migration if the guest had set any of the group register bits. Signed-off-by: Peter Maydell Message-id: 1430502643-25909-6-git-send-email-peter.maydell@linaro.org --- hw/intc/arm_gic_kvm.c | 30 ++++++++++++++++++++---------- 1 file changed, 20 insertions(+), 10 deletions(-) diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c index cb47b12..3591ca7 100644 --- a/hw/intc/arm_gic_kvm.c +++ b/hw/intc/arm_gic_kvm.c @@ -176,6 +176,20 @@ static void translate_clear(GICState *s, int irq, int cpu, } } +static void translate_group(GICState *s, int irq, int cpu, + uint32_t *field, bool to_kernel) +{ + int cm = (irq < GIC_INTERNAL) ? (1 << cpu) : ALL_CPU_MASK; + + if (to_kernel) { + *field = GIC_TEST_GROUP(irq, cm); + } else { + if (*field & 1) { + GIC_SET_GROUP(irq, cm); + } + } +} + static void translate_enabled(GICState *s, int irq, int cpu, uint32_t *field, bool to_kernel) { @@ -365,6 +379,9 @@ static void kvm_arm_gic_put(GICState *s) kvm_dist_put(s, 0x180, 1, s->num_irq, translate_clear); kvm_dist_put(s, 0x100, 1, s->num_irq, translate_enabled); + /* irq_state[n].group -> GICD_IGROUPRn */ + kvm_dist_put(s, 0x80, 1, s->num_irq, translate_group); + /* s->irq_target[irq] -> GICD_ITARGETSRn * (restore targets before pending to ensure the pending state is set on * the appropriate CPU interfaces in the kernel) */ @@ -454,21 +471,14 @@ static void kvm_arm_gic_get(GICState *s) /* GICD_IIDR -> ? */ kvm_gicd_access(s, 0x8, 0, ®, false); - /* Verify no GROUP 1 interrupts configured in the kernel */ - for_each_irq_reg(i, s->num_irq, 1) { - kvm_gicd_access(s, 0x80 + (i * 4), 0, ®, false); - if (reg != 0) { - fprintf(stderr, "Unsupported GICD_IGROUPRn value: %08x\n", - reg); - abort(); - } - } - /* Clear all the IRQ settings */ for (i = 0; i < s->num_irq; i++) { memset(&s->irq_state[i], 0, sizeof(s->irq_state[0])); } + /* GICD_IGROUPRn -> irq_state[n].group */ + kvm_dist_get(s, 0x80, 1, s->num_irq, translate_group); + /* GICD_ISENABLERn -> irq_state[n].enabled */ kvm_dist_get(s, 0x100, 1, s->num_irq, translate_enabled);