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[99.179.1.214]) by mx.google.com with ESMTPSA id x142sm2567707oie.19.2015.04.15.09.02.55 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 15 Apr 2015 09:02:56 -0700 (PDT) From: Greg Bellows To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Wed, 15 Apr 2015 11:02:21 -0500 Message-Id: <1429113742-8371-16-git-send-email-greg.bellows@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1429113742-8371-1-git-send-email-greg.bellows@linaro.org> References: <1429113742-8371-1-git-send-email-greg.bellows@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.214.171 Cc: Fabian Aggeler , Greg Bellows Subject: [Qemu-devel] [PATCH v3 15/16] hw/intc/arm_gic: Break out gic_update() function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: greg.bellows@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.48 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Fabian Aggeler Prepare to split gic_update() in two functions, one for GICs with interrupt grouping and one without grouping (existing). Signed-off-by: Fabian Aggeler Signed-off-by: Greg Bellows --- hw/intc/arm_gic.c | 11 ++++++++--- hw/intc/gic_internal.h | 1 + 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index 781cca9..c03b3dd 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -52,9 +52,7 @@ static inline bool ns_access(void) return true; } -/* TODO: Many places that call this routine could be optimized. */ -/* Update interrupt status after enabled or pending bits have been changed. */ -void gic_update(GICState *s) +inline void gic_update_no_grouping(GICState *s) { int best_irq; int best_prio; @@ -93,6 +91,13 @@ void gic_update(GICState *s) } } +/* TODO: Many places that call this routine could be optimized. */ +/* Update interrupt status after enabled or pending bits have been changed. */ +void gic_update(GICState *s) +{ + gic_update_no_grouping(s); +} + void gic_set_pending_private(GICState *s, int cpu, int irq) { int cm = 1 << cpu; diff --git a/hw/intc/gic_internal.h b/hw/intc/gic_internal.h index 13fe5a6..e16a7e5 100644 --- a/hw/intc/gic_internal.h +++ b/hw/intc/gic_internal.h @@ -73,6 +73,7 @@ void gic_set_pending_private(GICState *s, int cpu, int irq); uint32_t gic_acknowledge_irq(GICState *s, int cpu); void gic_complete_irq(GICState *s, int cpu, int irq); +inline void gic_update_no_grouping(GICState *s); void gic_update(GICState *s); void gic_init_irqs_and_distributor(GICState *s); void gic_set_priority(GICState *s, int cpu, int irq, uint8_t val);