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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id ri8si15773023pbc.225.2015.04.13.06.22.11 (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Mon, 13 Apr 2015 06:22:13 -0700 (PDT) Received-SPF: none (google.com: pm215@archaic.org.uk does not designate permitted sender hosts) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1YheJQ-0001J0-Ln; Mon, 13 Apr 2015 14:22:04 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Greg Bellows , Paolo Bonzini , Richard Henderson , "Edgar E. Iglesias" , Peter Crosthwaite , =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [PATCH v2 05/14] exec.c: Convert subpage memory ops to _with_attrs Date: Mon, 13 Apr 2015 14:21:55 +0100 Message-Id: <1428931324-4973-6-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1428931324-4973-1-git-send-email-peter.maydell@linaro.org> References: <1428931324-4973-1-git-send-email-peter.maydell@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.178 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Convert the subpage memory ops to _with_attrs; this will allow us to pass the attributes through to the underlying access functions. (Nothing uses the attributes yet.) Signed-off-by: Peter Maydell Reviewed-by: Paolo Bonzini Reviewed-by: Edgar E. Iglesias Reviewed-by: Alex Bennée --- exec.c | 33 +++++++++++++++++++++------------ 1 file changed, 21 insertions(+), 12 deletions(-) diff --git a/exec.c b/exec.c index 34dafd2..bba6f26 100644 --- a/exec.c +++ b/exec.c @@ -1941,8 +1941,8 @@ static const MemoryRegionOps watch_mem_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -static uint64_t subpage_read(void *opaque, hwaddr addr, - unsigned len) +static MemTxResult subpage_read(void *opaque, hwaddr addr, uint64_t *data, + unsigned len, MemTxAttrs attrs) { subpage_t *subpage = opaque; uint8_t buf[8]; @@ -1951,23 +1951,29 @@ static uint64_t subpage_read(void *opaque, hwaddr addr, printf("%s: subpage %p len %u addr " TARGET_FMT_plx "\n", __func__, subpage, len, addr); #endif - address_space_read(subpage->as, addr + subpage->base, buf, len); + if (address_space_read(subpage->as, addr + subpage->base, buf, len)) { + return MEMTX_DECODE_ERROR; + } switch (len) { case 1: - return ldub_p(buf); + *data = ldub_p(buf); + return MEMTX_OK; case 2: - return lduw_p(buf); + *data = lduw_p(buf); + return MEMTX_OK; case 4: - return ldl_p(buf); + *data = ldl_p(buf); + return MEMTX_OK; case 8: - return ldq_p(buf); + *data = ldq_p(buf); + return MEMTX_OK; default: abort(); } } -static void subpage_write(void *opaque, hwaddr addr, - uint64_t value, unsigned len) +static MemTxResult subpage_write(void *opaque, hwaddr addr, + uint64_t value, unsigned len, MemTxAttrs attrs) { subpage_t *subpage = opaque; uint8_t buf[8]; @@ -1993,7 +1999,10 @@ static void subpage_write(void *opaque, hwaddr addr, default: abort(); } - address_space_write(subpage->as, addr + subpage->base, buf, len); + if (address_space_write(subpage->as, addr + subpage->base, buf, len)) { + return MEMTX_DECODE_ERROR; + } + return MEMTX_OK; } static bool subpage_accepts(void *opaque, hwaddr addr, @@ -2010,8 +2019,8 @@ static bool subpage_accepts(void *opaque, hwaddr addr, } static const MemoryRegionOps subpage_ops = { - .read = subpage_read, - .write = subpage_write, + .read_with_attrs = subpage_read, + .write_with_attrs = subpage_write, .impl.min_access_size = 1, .impl.max_access_size = 8, .valid.min_access_size = 1,