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[209.85.217.169]) by mx.google.com with ESMTPS id jc11si1464191lac.15.2015.03.19.10.17.10 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Mar 2015 10:17:10 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.169 as permitted sender) client-ip=209.85.217.169; Received: by lbblx11 with SMTP id lx11so35689477lbb.3 for ; Thu, 19 Mar 2015 10:17:10 -0700 (PDT) X-Received: by 10.152.22.67 with SMTP id b3mr68410463laf.117.1426785430264; Thu, 19 Mar 2015 10:17:10 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.112.35.133 with SMTP id h5csp528209lbj; Thu, 19 Mar 2015 10:17:09 -0700 (PDT) X-Received: by 10.194.190.10 with SMTP id gm10mr155042528wjc.91.1426785416455; Thu, 19 Mar 2015 10:16:56 -0700 (PDT) Received: from mail-wg0-f54.google.com (mail-wg0-f54.google.com. [74.125.82.54]) by mx.google.com with ESMTPS id 14si3356452wjr.47.2015.03.19.10.16.56 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Mar 2015 10:16:56 -0700 (PDT) Received-SPF: pass (google.com: domain of eric.auger@linaro.org designates 74.125.82.54 as permitted sender) client-ip=74.125.82.54; Received: by wgbcc7 with SMTP id cc7so68264748wgb.0 for ; Thu, 19 Mar 2015 10:16:56 -0700 (PDT) X-Received: by 10.180.96.136 with SMTP id ds8mr17813149wib.47.1426785416178; Thu, 19 Mar 2015 10:16:56 -0700 (PDT) Received: from midway01-04-00.lavalab ([81.128.185.50]) by mx.google.com with ESMTPSA id pa4sm2767071wjb.11.2015.03.19.10.16.55 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 19 Mar 2015 10:16:55 -0700 (PDT) From: Eric Auger To: eric.auger@st.com, eric.auger@linaro.org, qemu-devel@nongnu.org, alex.williamson@redhat.com, peter.maydell@linaro.org, agraf@suse.de Cc: christoffer.dall@linaro.org, kvmarm@lists.cs.columbia.edu, patches@linaro.org, pbonzini@redhat.com, alex.bennee@linaro.org, kim.phillips@freescale.com, b.reynal@virtualopensystems.com, a.rigo@virtualopensystems.com Subject: [PATCH v12 8/9] linux-headers: update arm/arm64 KVM headers for irqfd Date: Thu, 19 Mar 2015 17:16:40 +0000 Message-Id: <1426785402-2091-9-git-send-email-eric.auger@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1426785402-2091-1-git-send-email-eric.auger@linaro.org> References: <1426785402-2091-1-git-send-email-eric.auger@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: eric.auger@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.169 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Update according to arm/arm64 kvm.h headers found in ssh://git.linaro.org/people/eric.auger/linux.git branch irqfd_v9_stdalone_official_release Signed-off-by: Eric Auger --- linux-headers/asm-arm/kvm.h | 3 +++ linux-headers/asm-arm64/kvm.h | 3 +++ 2 files changed, 6 insertions(+) diff --git a/linux-headers/asm-arm/kvm.h b/linux-headers/asm-arm/kvm.h index 0db25bc..2499867 100644 --- a/linux-headers/asm-arm/kvm.h +++ b/linux-headers/asm-arm/kvm.h @@ -198,6 +198,9 @@ struct kvm_arch_memory_slot { /* Highest supported SPI, from VGIC_NR_IRQS */ #define KVM_ARM_IRQ_GIC_MAX 127 +/* One single KVM irqchip, ie. the VGIC */ +#define KVM_NR_IRQCHIPS 1 + /* PSCI interface */ #define KVM_PSCI_FN_BASE 0x95c1ba5e #define KVM_PSCI_FN(n) (KVM_PSCI_FN_BASE + (n)) diff --git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h index 3ef77a4..c154c0b 100644 --- a/linux-headers/asm-arm64/kvm.h +++ b/linux-headers/asm-arm64/kvm.h @@ -191,6 +191,9 @@ struct kvm_arch_memory_slot { /* Highest supported SPI, from VGIC_NR_IRQS */ #define KVM_ARM_IRQ_GIC_MAX 127 +/* One single KVM irqchip, ie. the VGIC */ +#define KVM_NR_IRQCHIPS 1 + /* PSCI interface */ #define KVM_PSCI_FN_BASE 0x95c1ba5e #define KVM_PSCI_FN(n) (KVM_PSCI_FN_BASE + (n))