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[209.85.217.179]) by mx.google.com with ESMTPS id lj8si1423419lab.82.2015.03.19.10.17.00 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Mar 2015 10:17:00 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.179 as permitted sender) client-ip=209.85.217.179; Received: by lbbsy1 with SMTP id sy1so57862691lbb.1 for ; Thu, 19 Mar 2015 10:17:00 -0700 (PDT) X-Received: by 10.152.30.103 with SMTP id r7mr65713169lah.76.1426785420785; Thu, 19 Mar 2015 10:17:00 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.112.35.133 with SMTP id h5csp528134lbj; Thu, 19 Mar 2015 10:17:00 -0700 (PDT) X-Received: by 10.194.5.37 with SMTP id p5mr155661086wjp.20.1426785413673; Thu, 19 Mar 2015 10:16:53 -0700 (PDT) Received: from mail-wi0-f182.google.com (mail-wi0-f182.google.com. [209.85.212.182]) by mx.google.com with ESMTPS id oq10si3318131wjc.73.2015.03.19.10.16.53 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 19 Mar 2015 10:16:53 -0700 (PDT) Received-SPF: pass (google.com: domain of eric.auger@linaro.org designates 209.85.212.182 as permitted sender) client-ip=209.85.212.182; Received: by wixw10 with SMTP id w10so75508344wix.0 for ; Thu, 19 Mar 2015 10:16:53 -0700 (PDT) X-Received: by 10.181.9.107 with SMTP id dr11mr18529871wid.40.1426785413423; Thu, 19 Mar 2015 10:16:53 -0700 (PDT) Received: from midway01-04-00.lavalab ([81.128.185.50]) by mx.google.com with ESMTPSA id pa4sm2767071wjb.11.2015.03.19.10.16.52 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 19 Mar 2015 10:16:52 -0700 (PDT) From: Eric Auger To: eric.auger@st.com, eric.auger@linaro.org, qemu-devel@nongnu.org, alex.williamson@redhat.com, peter.maydell@linaro.org, agraf@suse.de Cc: christoffer.dall@linaro.org, kvmarm@lists.cs.columbia.edu, patches@linaro.org, pbonzini@redhat.com, alex.bennee@linaro.org, kim.phillips@freescale.com, b.reynal@virtualopensystems.com, a.rigo@virtualopensystems.com Subject: [PATCH v12 5/9] hw/arm/virt: start VFIO IRQ propagation Date: Thu, 19 Mar 2015 17:16:37 +0000 Message-Id: <1426785402-2091-6-git-send-email-eric.auger@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1426785402-2091-1-git-send-email-eric.auger@linaro.org> References: <1426785402-2091-1-git-send-email-eric.auger@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: eric.auger@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.179 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Although the dynamic instantiation of VFIO QEMU devices already is possible, VFIO IRQ signaling is not yet started. This patch enables IRQ forwarding by registering a reset notifier that kick off VFIO signaling for all VFIO devices. Such mechanism is requested because the VFIO IRQ binding is handled in a machine init done notifier and only at that time the aboslute GSI number the physical IRQ is forwarded to is known. Signed-off-by: Eric Auger v10 - v11: - becomes a separate patch --- hw/arm/virt.c | 34 ++++++++++++++++++++-------------- 1 file changed, 20 insertions(+), 14 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 439739d..820b09d 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -45,6 +45,7 @@ #include "hw/pci-host/gpex.h" #include "hw/arm/sysbus-fdt.h" #include "hw/platform-bus.h" +#include "hw/vfio/vfio-platform.h" #define NUM_VIRTIO_TRANSPORTS 32 @@ -354,10 +355,10 @@ static uint32_t fdt_add_gic_node(const VirtBoardInfo *vbi) return gic_phandle; } -static uint32_t create_gic(const VirtBoardInfo *vbi, qemu_irq *pic) +static uint32_t create_gic(const VirtBoardInfo *vbi, qemu_irq *pic, + DeviceState **gicdev) { /* We create a standalone GIC v2 */ - DeviceState *gicdev; SysBusDevice *gicbusdev; const char *gictype = "arm_gic"; int i; @@ -366,15 +367,15 @@ static uint32_t create_gic(const VirtBoardInfo *vbi, qemu_irq *pic) gictype = "kvm-arm-gic"; } - gicdev = qdev_create(NULL, gictype); - qdev_prop_set_uint32(gicdev, "revision", 2); - qdev_prop_set_uint32(gicdev, "num-cpu", smp_cpus); + *gicdev = qdev_create(NULL, gictype); + qdev_prop_set_uint32(*gicdev, "revision", 2); + qdev_prop_set_uint32(*gicdev, "num-cpu", smp_cpus); /* Note that the num-irq property counts both internal and external * interrupts; there are always 32 of the former (mandated by GIC spec). */ - qdev_prop_set_uint32(gicdev, "num-irq", NUM_IRQS + 32); - qdev_init_nofail(gicdev); - gicbusdev = SYS_BUS_DEVICE(gicdev); + qdev_prop_set_uint32(*gicdev, "num-irq", NUM_IRQS + 32); + qdev_init_nofail(*gicdev); + gicbusdev = SYS_BUS_DEVICE(*gicdev); sysbus_mmio_map(gicbusdev, 0, vbi->memmap[VIRT_GIC_DIST].base); sysbus_mmio_map(gicbusdev, 1, vbi->memmap[VIRT_GIC_CPU].base); @@ -389,16 +390,16 @@ static uint32_t create_gic(const VirtBoardInfo *vbi, qemu_irq *pic) * since a real A15 always has TrustZone but QEMU doesn't. */ qdev_connect_gpio_out(cpudev, 0, - qdev_get_gpio_in(gicdev, ppibase + 30)); + qdev_get_gpio_in(*gicdev, ppibase + 30)); /* virtual timer */ qdev_connect_gpio_out(cpudev, 1, - qdev_get_gpio_in(gicdev, ppibase + 27)); + qdev_get_gpio_in(*gicdev, ppibase + 27)); sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ)); } for (i = 0; i < NUM_IRQS; i++) { - pic[i] = qdev_get_gpio_in(gicdev, i); + pic[i] = qdev_get_gpio_in(*gicdev, i); } return fdt_add_gic_node(vbi); @@ -719,7 +720,8 @@ static void create_pcie(const VirtBoardInfo *vbi, qemu_irq *pic, g_free(nodename); } -static void create_platform_bus(VirtBoardInfo *vbi, qemu_irq *pic) +static void create_platform_bus(VirtBoardInfo *vbi, qemu_irq *pic, + DeviceState *gic) { DeviceState *dev; SysBusDevice *s; @@ -758,6 +760,9 @@ static void create_platform_bus(VirtBoardInfo *vbi, qemu_irq *pic) memory_region_add_subregion(sysmem, platform_bus_params.platform_bus_base, sysbus_mmio_get_region(s, 0)); + + /* setup VFIO signaling/IRQFD for all VFIO platform sysbus devices */ + qemu_register_reset(vfio_kick_irqs, gic); } static void *machvirt_dtb(const struct arm_boot_info *binfo, int *fdt_size) @@ -779,6 +784,7 @@ static void machvirt_init(MachineState *machine) VirtBoardInfo *vbi; uint32_t gic_phandle; char **cpustr; + DeviceState *gicdev; if (!cpu_model) { cpu_model = "cortex-a15"; @@ -855,7 +861,7 @@ static void machvirt_init(MachineState *machine) create_flash(vbi); - gic_phandle = create_gic(vbi, pic); + gic_phandle = create_gic(vbi, pic, &gicdev); create_uart(vbi, pic); @@ -888,7 +894,7 @@ static void machvirt_init(MachineState *machine) * another notifier is registered which adds platform bus nodes. * Notifiers are executed in registration reverse order. */ - create_platform_bus(vbi, pic); + create_platform_bus(vbi, pic, gicdev); } static bool virt_get_secure(Object *obj, Error **errp)