From patchwork Mon Jan 19 22:30:17 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Bellows X-Patchwork-Id: 43335 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-we0-f200.google.com (mail-we0-f200.google.com [74.125.82.200]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id D38DB2034D for ; Mon, 19 Jan 2015 22:31:58 +0000 (UTC) Received: by mail-we0-f200.google.com with SMTP id u56sf18094649wes.3 for ; Mon, 19 Jan 2015 14:31:58 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:date :message-id:in-reply-to:references:cc:subject:precedence:list-id :list-unsubscribe:list-archive:list-post:list-help:list-subscribe :errors-to:sender:x-original-sender :x-original-authentication-results:mailing-list; bh=9hHVcgZU6o3ekOowKyVODv8h1CrT5P9RA4BMjYmP65o=; b=Z+PixFDOb36wold5zNdUvwI2OeWHbbemUoPjgVKMYXY0D81+DeG8RVJLF3zCEXNVju +ESsuxuWKiyy8bsVqMkiD+asdG8Sv/7zXFvgTW4/BostUMNahbd2Ms5KHx7SmCzuGEQQ 5KnPAjPWn4J4dg7UBFNJNeYMQqftJiBCCPYP1Ac7B8nb3K0SxCCchf5Q3rsnoVXIN4iF CQ30iLrccwsQM1/LdXKLkRC93mQbS6P1shsTZClVZ3mDGhYxBsKCyndRWx3EBqyal/v/ EQnDSITonR7QtNbVchAicJs4bDeBxtL339pbFzmWKWqo8jG9AruVMnc4ItK8DgcFqyQO JSqg== X-Gm-Message-State: ALoCoQl8JjICmtBrhnGCyQpFse2oHFHpbilWCF+EyKLTL+yAcLCh3Cir+hTQOOkHZQMPVVS0/ba6 X-Received: by 10.180.82.34 with SMTP id f2mr2363757wiy.1.1421706718092; Mon, 19 Jan 2015 14:31:58 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.205.10 with SMTP id lc10ls646972lac.22.gmail; Mon, 19 Jan 2015 14:31:57 -0800 (PST) X-Received: by 10.152.42.131 with SMTP id o3mr20303637lal.43.1421706717931; Mon, 19 Jan 2015 14:31:57 -0800 (PST) Received: from mail-la0-f43.google.com (mail-la0-f43.google.com. [209.85.215.43]) by mx.google.com with ESMTPS id g1si14924291lag.18.2015.01.19.14.31.57 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 19 Jan 2015 14:31:57 -0800 (PST) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.43 as permitted sender) client-ip=209.85.215.43; Received: by mail-la0-f43.google.com with SMTP id q1so15991388lam.2 for ; Mon, 19 Jan 2015 14:31:57 -0800 (PST) X-Received: by 10.152.8.11 with SMTP id n11mr33919597laa.38.1421706717791; Mon, 19 Jan 2015 14:31:57 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.9.200 with SMTP id c8csp1229047lbb; Mon, 19 Jan 2015 14:31:57 -0800 (PST) X-Received: by 10.140.38.114 with SMTP id s105mr49885337qgs.106.1421706716545; Mon, 19 Jan 2015 14:31:56 -0800 (PST) Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id f98si4917199qge.44.2015.01.19.14.31.55 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 19 Jan 2015 14:31:56 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:40066 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YDKrT-0004AZ-A6 for patch@linaro.org; Mon, 19 Jan 2015 17:31:55 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57849) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YDKqV-00038B-Ca for qemu-devel@nongnu.org; Mon, 19 Jan 2015 17:30:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YDKqQ-0003QU-Qb for qemu-devel@nongnu.org; Mon, 19 Jan 2015 17:30:55 -0500 Received: from mail-pd0-f182.google.com ([209.85.192.182]:49594) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YDKqQ-0003QP-Kq for qemu-devel@nongnu.org; Mon, 19 Jan 2015 17:30:50 -0500 Received: by mail-pd0-f182.google.com with SMTP id y10so27518580pdj.13 for ; Mon, 19 Jan 2015 14:30:49 -0800 (PST) X-Received: by 10.68.202.194 with SMTP id kk2mr47844676pbc.41.1421706649725; Mon, 19 Jan 2015 14:30:49 -0800 (PST) Received: from gbellows-linaro.qualcomm.com (rrcs-67-52-129-61.west.biz.rr.com. [67.52.129.61]) by mx.google.com with ESMTPSA id rl10sm985994pbb.67.2015.01.19.14.30.48 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 19 Jan 2015 14:30:48 -0800 (PST) From: Greg Bellows To: qemu-devel@nongnu.org, peter.maydell@linaro.org, christoffer.dall@linaro.org Date: Mon, 19 Jan 2015 16:30:17 -0600 Message-Id: <1421706621-23731-2-git-send-email-greg.bellows@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1421706621-23731-1-git-send-email-greg.bellows@linaro.org> References: <1421706621-23731-1-git-send-email-greg.bellows@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.192.182 Cc: Greg Bellows Subject: [Qemu-devel] [PATCH 1/5] target-arm: Add ARM CPU feature parsing X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: greg.bellows@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.43 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Adds a CPU feature parsing function and assigns to the CPU class. The only feature added was "-aarch64" which disabled the AArch64 execution state on a 64-bit ARM CPU. Also adds stripping of features from CPU model string in acquiring the ARM CPU by name. Signed-off-by: Greg Bellows --- target-arm/cpu.c | 45 ++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 44 insertions(+), 1 deletion(-) diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 285947f..f327dd7 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -514,13 +514,17 @@ static ObjectClass *arm_cpu_class_by_name(const char *cpu_model) { ObjectClass *oc; char *typename; + char *cpuname; if (!cpu_model) { return NULL; } - typename = g_strdup_printf("%s-" TYPE_ARM_CPU, cpu_model); + cpuname = g_strdup(cpu_model); + cpuname = strtok(cpuname, ","); + typename = g_strdup_printf("%s-" TYPE_ARM_CPU, cpuname); oc = object_class_by_name(typename); + g_free(cpuname); g_free(typename); if (!oc || !object_class_dynamic_cast(oc, TYPE_ARM_CPU) || object_class_is_abstract(oc)) { @@ -1163,6 +1167,44 @@ static Property arm_cpu_properties[] = { DEFINE_PROP_END_OF_LIST() }; +static void arm_cpu_parse_features(CPUState *cs, char *features, + Error **errp) +{ + ARMCPU *cpu = ARM_CPU(cs); + char *featurestr; + + featurestr = features ? strtok(features, ",") : NULL; + while (featurestr) { + if (featurestr[0] == '-') { + if (!strcmp(featurestr+1, "aarch64")) { + /* If AArch64 is disabled then we need to unset the feature */ + unset_feature(&cpu->env, ARM_FEATURE_AARCH64); + } else { + /* Everyting else is unsupported */ + error_setg(errp, "unsupported CPU property '%s'", + &featurestr[1]); + return; + } + } else if (featurestr[0] == '+') { + /* No '+' properties supported yet */ + error_setg(errp, "unsupported CPU property '%s'", + &featurestr[1]); + return; + } else if (g_strstr_len(featurestr, -1, "=")) { + /* No '=' properties supported yet */ + char *prop = strtok(featurestr, "="); + error_setg(errp, "unsupported CPU property '%s'", prop); + return; + } else { + /* Everything else is a bad format */ + error_setg(errp, "CPU property string '%s' not in format " + "(+feature|-feature|feature=xyz)", featurestr); + return; + } + featurestr = strtok(NULL, ","); + } +} + static void arm_cpu_class_init(ObjectClass *oc, void *data) { ARMCPUClass *acc = ARM_CPU_CLASS(oc); @@ -1183,6 +1225,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) cc->set_pc = arm_cpu_set_pc; cc->gdb_read_register = arm_cpu_gdb_read_register; cc->gdb_write_register = arm_cpu_gdb_write_register; + cc->parse_features = arm_cpu_parse_features; #ifdef CONFIG_USER_ONLY cc->handle_mmu_fault = arm_cpu_handle_mmu_fault; #else