From patchwork Thu Dec 11 23:29:27 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg Bellows X-Patchwork-Id: 42173 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-lb0-f199.google.com (mail-lb0-f199.google.com [209.85.217.199]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 642B526666 for ; Thu, 11 Dec 2014 23:40:50 +0000 (UTC) Received: by mail-lb0-f199.google.com with SMTP id u10sf4186586lbd.6 for ; Thu, 11 Dec 2014 15:40:49 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:date :message-id:in-reply-to:references:cc:subject:precedence:list-id :list-unsubscribe:list-archive:list-post:list-help:list-subscribe :errors-to:sender:x-original-sender :x-original-authentication-results:mailing-list; bh=/PEXsWBKtgqvah1HxWLHUFQRvGHYWbGE2XPrba0eHcI=; b=SC8VFGifhFGQZgyWYNQ8S0S+KFFFdWBHGgKbNMTCtJ7I0GzG8I4XlCmds1sOgAmcTg 2BtQ7j6eLl3XovIu1JffL6lTZzv6nBF37WQVetc/RFIsss8bxnuJzLdLhyGV6p88ftDY CdgJpFVXoOd4sGGo8BHH5p3OMCkzR8k1sn34sX90pyYygty2mPMo+NQOg/UqH7FCi+fy +ztjgCLM6LXUmJfKcooqxaCltWdNT8lpcYjsgb3YfDNXtFUEWElyCgertitAerHrX5W8 tY3qr6mj26/0seTDSChRkuMv5Qb6xnq9VwQCeOKhn6sgmN5yTCPgcjhG+gOviBqlaGPv qbkw== X-Gm-Message-State: ALoCoQnaqtCWXGK/C3Qs1brsrQysiWeXFNwPymRKty0aioBP2DnMYiaxP2HtiwmuGnc4v6L01xX3 X-Received: by 10.112.143.136 with SMTP id se8mr3449lbb.18.1418341249412; Thu, 11 Dec 2014 15:40:49 -0800 (PST) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.5.74 with SMTP id q10ls372062laq.43.gmail; Thu, 11 Dec 2014 15:40:49 -0800 (PST) X-Received: by 10.112.158.40 with SMTP id wr8mr12476353lbb.51.1418341249104; Thu, 11 Dec 2014 15:40:49 -0800 (PST) Received: from mail-la0-f49.google.com (mail-la0-f49.google.com. [209.85.215.49]) by mx.google.com with ESMTPS id q7si2722077lah.99.2014.12.11.15.40.49 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 11 Dec 2014 15:40:49 -0800 (PST) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.49 as permitted sender) client-ip=209.85.215.49; Received: by mail-la0-f49.google.com with SMTP id hs14so5240456lab.36 for ; Thu, 11 Dec 2014 15:40:49 -0800 (PST) X-Received: by 10.112.219.37 with SMTP id pl5mr9409971lbc.25.1418341248942; Thu, 11 Dec 2014 15:40:48 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.142.69 with SMTP id ru5csp688003lbb; Thu, 11 Dec 2014 15:40:48 -0800 (PST) X-Received: by 10.229.251.200 with SMTP id mt8mr25471560qcb.13.1418341247421; Thu, 11 Dec 2014 15:40:47 -0800 (PST) Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id p10si561898qai.62.2014.12.11.15.40.46 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 11 Dec 2014 15:40:47 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:54710 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XzDLi-0001sh-KI for patch@linaro.org; Thu, 11 Dec 2014 18:40:46 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57574) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XzDBQ-0004BQ-7b for qemu-devel@nongnu.org; Thu, 11 Dec 2014 18:30:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XzDBK-00018l-B3 for qemu-devel@nongnu.org; Thu, 11 Dec 2014 18:30:08 -0500 Received: from mail-pd0-f181.google.com ([209.85.192.181]:51151) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XzDBJ-00016d-SE for qemu-devel@nongnu.org; Thu, 11 Dec 2014 18:30:02 -0500 Received: by mail-pd0-f181.google.com with SMTP id v10so5923516pde.12 for ; Thu, 11 Dec 2014 15:30:01 -0800 (PST) X-Received: by 10.68.162.100 with SMTP id xz4mr21674097pbb.138.1418340601383; Thu, 11 Dec 2014 15:30:01 -0800 (PST) Received: from gbellows-linaro.qualcomm.com (rrcs-67-52-129-61.west.biz.rr.com. [67.52.129.61]) by mx.google.com with ESMTPSA id ip1sm2362908pbc.0.2014.12.11.15.29.59 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 11 Dec 2014 15:30:00 -0800 (PST) From: Greg Bellows To: qemu-devel@nongnu.org, serge.fdrv@gmail.com, edgar.iglesias@gmail.com, aggelerf@ethz.ch, peter.maydell@linaro.org Date: Thu, 11 Dec 2014 17:29:27 -0600 Message-Id: <1418340569-30519-14-git-send-email-greg.bellows@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1418340569-30519-1-git-send-email-greg.bellows@linaro.org> References: <1418340569-30519-1-git-send-email-greg.bellows@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.192.181 Cc: Greg Bellows Subject: [Qemu-devel] [PATCH v2 13/15] target-arm: Breakout integratorcp and versatilepb cpu init X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: greg.bellows@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.49 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 This commit changes the integratorcp and versatilepb CPU initialization from using the generic ARM cpu_arm_init function to doing it inline. This is necessary in order to allow CPU configuration changes to occur between CPU instance initialization and realization. Specifically, this change is in preparation for disabling CPU EL3 support. Signed-off-by: Greg Bellows Reviewed-by: Peter Maydell --- hw/arm/integratorcp.c | 19 +++++++++++++++++-- hw/arm/versatilepb.c | 20 ++++++++++++++++++-- 2 files changed, 35 insertions(+), 4 deletions(-) diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c index 266ec18..f196189 100644 --- a/hw/arm/integratorcp.c +++ b/hw/arm/integratorcp.c @@ -15,6 +15,7 @@ #include "net/net.h" #include "exec/address-spaces.h" #include "sysemu/sysemu.h" +#include "qemu/error-report.h" #define TYPE_INTEGRATOR_CM "integrator_core" #define INTEGRATOR_CM(obj) \ @@ -469,6 +470,8 @@ static void integratorcp_init(MachineState *machine) const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; const char *initrd_filename = machine->initrd_filename; + ObjectClass *cpu_oc; + Object *cpuobj; ARMCPU *cpu; MemoryRegion *address_space_mem = get_system_memory(); MemoryRegion *ram = g_new(MemoryRegion, 1); @@ -476,16 +479,28 @@ static void integratorcp_init(MachineState *machine) qemu_irq pic[32]; DeviceState *dev; int i; + Error *err = NULL; if (!cpu_model) { cpu_model = "arm926"; } - cpu = cpu_arm_init(cpu_model); - if (!cpu) { + + cpu_oc = cpu_class_by_name(TYPE_ARM_CPU, cpu_model); + if (!cpu_oc) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); } + cpuobj = object_new(object_class_get_name(cpu_oc)); + + object_property_set_bool(cpuobj, true, "realized", &err); + if (err) { + error_report("%s", error_get_pretty(err)); + exit(1); + } + + cpu = ARM_CPU(cpuobj); + memory_region_init_ram(ram, NULL, "integrator.ram", ram_size, &error_abort); vmstate_register_ram_global(ram); /* ??? On a real system the first 1Mb is mapped as SSRAM or boot flash. */ diff --git a/hw/arm/versatilepb.c b/hw/arm/versatilepb.c index e6ef0a2..b74dc15 100644 --- a/hw/arm/versatilepb.c +++ b/hw/arm/versatilepb.c @@ -18,6 +18,7 @@ #include "sysemu/block-backend.h" #include "exec/address-spaces.h" #include "hw/block/flash.h" +#include "qemu/error-report.h" #define VERSATILE_FLASH_ADDR 0x34000000 #define VERSATILE_FLASH_SIZE (64 * 1024 * 1024) @@ -175,6 +176,8 @@ static struct arm_boot_info versatile_binfo; static void versatile_init(MachineState *machine, int board_id) { + ObjectClass *cpu_oc; + Object *cpuobj; ARMCPU *cpu; MemoryRegion *sysmem = get_system_memory(); MemoryRegion *ram = g_new(MemoryRegion, 1); @@ -189,15 +192,28 @@ static void versatile_init(MachineState *machine, int board_id) int n; int done_smc = 0; DriveInfo *dinfo; + Error *err = NULL; if (!machine->cpu_model) { machine->cpu_model = "arm926"; } - cpu = cpu_arm_init(machine->cpu_model); - if (!cpu) { + + cpu_oc = cpu_class_by_name(TYPE_ARM_CPU, machine->cpu_model); + if (!cpu_oc) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); } + + cpuobj = object_new(object_class_get_name(cpu_oc)); + + object_property_set_bool(cpuobj, true, "realized", &err); + if (err) { + error_report("%s", error_get_pretty(err)); + exit(1); + } + + cpu = ARM_CPU(cpuobj); + memory_region_init_ram(ram, NULL, "versatile.ram", machine->ram_size, &error_abort); vmstate_register_ram_global(ram);