From patchwork Fri Aug 8 15:03:49 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Auger Eric X-Patchwork-Id: 35140 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-vc0-f197.google.com (mail-vc0-f197.google.com [209.85.220.197]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 9EAAB2118A for ; Fri, 8 Aug 2014 15:04:27 +0000 (UTC) Received: by mail-vc0-f197.google.com with SMTP id ij19sf15783832vcb.8 for ; Fri, 08 Aug 2014 08:04:27 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=/2IR07Oep7iHvxfbjiBN9RBH+hoxTnK+0TldQtwG7Kc=; b=ZOD8LsTH5BRnCBsKoftYLU2DawKCLqimgvyGeUxfij4NopT4Un+SRrLc8edYYqm/uf qAkClj/fKYIlC14CvyZy1UjTjmA4djKrGqwg4odP1l7/usi80AdIZ6/Mrv5ippJ+4LS8 IwCxHXCeh7ereZ31IoYZixNbAolBrbRHniqm3mdXC/8JTNNDsUxdoGXKQr+NXBSBpQDV 3Y47mZQS8UfOM6V8LwhlqnvcRB+/10wrE4SH8BU65rThmLA49FW8XgE9Q8/1jySQKw6Z zB+NlTI8RJOsXvRjQI8fLt/BWpMPm87FMdb+GgMADxU0mL98Fr47x0mUimmgFJ22Rfci kZQQ== X-Gm-Message-State: ALoCoQmrcPE1udSHtDTg+lGhci5N1znJGtH6LUpQcnk3nJLbPe2dbj9CEkSpRCPopstLNRhEqcuy X-Received: by 10.224.21.129 with SMTP id j1mr12829884qab.7.1407510267481; Fri, 08 Aug 2014 08:04:27 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.41.211 with SMTP id z77ls547336qgz.54.gmail; Fri, 08 Aug 2014 08:04:27 -0700 (PDT) X-Received: by 10.221.61.5 with SMTP id wu5mr4026832vcb.13.1407510267417; Fri, 08 Aug 2014 08:04:27 -0700 (PDT) Received: from mail-vc0-f172.google.com (mail-vc0-f172.google.com [209.85.220.172]) by mx.google.com with ESMTPS id t4si2977875vef.3.2014.08.08.08.04.27 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 08 Aug 2014 08:04:27 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.172 as permitted sender) client-ip=209.85.220.172; Received: by mail-vc0-f172.google.com with SMTP id im17so8578027vcb.3 for ; Fri, 08 Aug 2014 08:04:27 -0700 (PDT) X-Received: by 10.220.252.198 with SMTP id mx6mr22075538vcb.15.1407510267316; Fri, 08 Aug 2014 08:04:27 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.221.37.5 with SMTP id tc5csp130667vcb; Fri, 8 Aug 2014 08:04:26 -0700 (PDT) X-Received: by 10.180.106.6 with SMTP id gq6mr270562wib.5.1407510265860; Fri, 08 Aug 2014 08:04:25 -0700 (PDT) Received: from mail-wg0-f46.google.com (mail-wg0-f46.google.com [74.125.82.46]) by mx.google.com with ESMTPS id u10si12080650wjr.88.2014.08.08.08.04.25 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 08 Aug 2014 08:04:25 -0700 (PDT) Received-SPF: pass (google.com: domain of eric.auger@linaro.org designates 74.125.82.46 as permitted sender) client-ip=74.125.82.46; Received: by mail-wg0-f46.google.com with SMTP id m15so5709890wgh.29 for ; Fri, 08 Aug 2014 08:04:25 -0700 (PDT) X-Received: by 10.194.6.101 with SMTP id z5mr33512558wjz.79.1407510265274; Fri, 08 Aug 2014 08:04:25 -0700 (PDT) Received: from midway01-04-00.lavalab ([88.98.47.97]) by mx.google.com with ESMTPSA id ko8sm17950604wjc.11.2014.08.08.08.04.24 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 08 Aug 2014 08:04:24 -0700 (PDT) From: Eric Auger To: eric.auger@st.com, christoffer.dall@linaro.org, qemu-devel@nongnu.org, kim.phillips@freescale.com, a.rigo@virtualopensystems.com Cc: eric.auger@linaro.org, will.deacon@arm.com, kvmarm@lists.cs.columbia.edu, alex.williamson@redhat.com, Bharat.Bhushan@freescale.com, agraf@suse.de, peter.maydell@linaro.org, stuart.yoder@freescale.com, a.motakis@virtualopensystems.com, patches@linaro.org Subject: [RFC v2 7/7] hw/arm/virt: Support dynamically spawned sysbus devices Date: Fri, 8 Aug 2014 16:03:49 +0100 Message-Id: <1407510229-28167-8-git-send-email-eric.auger@linaro.org> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1407510229-28167-1-git-send-email-eric.auger@linaro.org> References: <1407510229-28167-1-git-send-email-eric.auger@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: eric.auger@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.172 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Allows sysbus devices to be instantiated from command line by using -device option --- v1 -> v2: - remove useless vfio-platform.h include file - s/MACHVIRT_PLATFORM_HOLE/MACHVIRT_PLATFORM_SIZE - use dyn_sysbus_binding and dyn_sysbus_devtree - dynamic sysbus platform buse size shrinked to 4MB and moved between RTC and MMIO v1: Inspired from what Alex Graf did in ppc e500 https://lists.gnu.org/archive/html/qemu-ppc/2014-07/msg00012.html Signed-off-by: Alexander Graf Signed-off-by: Eric Auger --- hw/arm/virt.c | 62 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 60 insertions(+), 2 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 1a18a5a..06f4fad 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -40,6 +40,8 @@ #include "exec/address-spaces.h" #include "qemu/bitops.h" #include "qemu/error-report.h" +#include "hw/misc/dyn_sysbus_binding.h" +#include "hw/arm/dyn_sysbus_devtree.h" #define NUM_VIRTIO_TRANSPORTS 32 @@ -57,6 +59,14 @@ #define GIC_FDT_IRQ_PPI_CPU_START 8 #define GIC_FDT_IRQ_PPI_CPU_WIDTH 8 +#define MACHVIRT_PLATFORM_BASE 0x9400000 +#define MACHVIRT_PLATFORM_SIZE (4ULL * 1024 * 1024) /* 4 MB */ +#define MACHVIRT_PLATFORM_PAGE_SHIFT 12 +#define MACHVIRT_PLATFORM_SIZE_PAGES (MACHVIRT_PLATFORM_SIZE >> \ + MACHVIRT_PLATFORM_PAGE_SHIFT) +#define MACHVIRT_PLATFORM_FIRST_IRQ 48 +#define MACHVIRT_PLATFORM_NUM_IRQS 20 + enum { VIRT_FLASH, VIRT_MEM, @@ -66,6 +76,7 @@ enum { VIRT_UART, VIRT_MMIO, VIRT_RTC, + VIRT_PLATFORM, }; typedef struct MemMapEntry { @@ -105,16 +116,27 @@ static const MemMapEntry a15memmap[] = { [VIRT_GIC_CPU] = { 0x08010000, 0x00010000 }, [VIRT_UART] = { 0x09000000, 0x00001000 }, [VIRT_RTC] = { 0x09010000, 0x00001000 }, + [VIRT_PLATFORM] = {MACHVIRT_PLATFORM_BASE , MACHVIRT_PLATFORM_SIZE}, [VIRT_MMIO] = { 0x0a000000, 0x00000200 }, /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */ /* 0x10000000 .. 0x40000000 reserved for PCI */ - [VIRT_MEM] = { 0x40000000, 30ULL * 1024 * 1024 * 1024 }, + [VIRT_MEM] = { 0x40000000, 30ULL * 1024 * 1024 * 1024 }, }; static const int a15irqmap[] = { [VIRT_UART] = 1, [VIRT_RTC] = 2, [VIRT_MMIO] = 16, /* ...to 16 + NUM_VIRTIO_TRANSPORTS - 1 */ + [VIRT_PLATFORM] = MACHVIRT_PLATFORM_FIRST_IRQ, +}; + +static DynSysbusParams dyn_sysbus_platform_params = { + .has_platform_bus = true, + .platform_bus_base = MACHVIRT_PLATFORM_BASE, + .platform_bus_size = MACHVIRT_PLATFORM_SIZE, + .platform_bus_first_irq = MACHVIRT_PLATFORM_FIRST_IRQ, + .platform_bus_num_irqs = MACHVIRT_PLATFORM_NUM_IRQS, + .page_shift = MACHVIRT_PLATFORM_PAGE_SHIFT, }; static VirtBoardInfo machines[] = { @@ -444,6 +466,18 @@ static void create_virtio_devices(const VirtBoardInfo *vbi, qemu_irq *pic) fdt_add_virtio_nodes(vbi); } +static void machvirt_prep_device_tree(VirtBoardInfo *vbi) +{ + create_fdt(vbi); + fdt_add_timer_nodes(vbi); + fdt_add_cpu_nodes(vbi); + fdt_add_psci_node(vbi); + fdt_add_gic_node(vbi); + fdt_add_uart_node(vbi); + fdt_add_rtc_node(vbi); + fdt_add_virtio_nodes(vbi); +} + static void *machvirt_dtb(const struct arm_boot_info *binfo, int *fdt_size) { const VirtBoardInfo *board = (const VirtBoardInfo *)binfo; @@ -452,14 +486,28 @@ static void *machvirt_dtb(const struct arm_boot_info *binfo, int *fdt_size) return board->fdt; } +static void machvirt_reset_device_tree(void *opaque) +{ + VirtBoardInfo *board = (VirtBoardInfo *)opaque; + struct arm_boot_info *info = &board->bootinfo; + hwaddr dtb_start = QEMU_ALIGN_UP(info->initrd_start + info->initrd_size, + 4096); + machvirt_prep_device_tree(board); + platform_bus_create_devtree(&dyn_sysbus_platform_params, + board->fdt, "/intc"); + + load_dtb(dtb_start, info); +} + static void machvirt_init(MachineState *machine) { - qemu_irq pic[NUM_IRQS]; + qemu_irq *pic = g_new(qemu_irq, NUM_IRQS); MemoryRegion *sysmem = get_system_memory(); int n; MemoryRegion *ram = g_new(MemoryRegion, 1); const char *cpu_model = machine->cpu_model; VirtBoardInfo *vbi; + DynSysbusNotifier *notifier; if (!cpu_model) { cpu_model = "cortex-a15"; @@ -533,6 +581,13 @@ static void machvirt_init(MachineState *machine) */ create_virtio_devices(vbi, pic); + notifier = g_new(DynSysbusNotifier, 1); + notifier->notifier.notify = platform_bus_init_notify; + notifier->address_space_mem = sysmem; + notifier->mpic = pic; + notifier->params = dyn_sysbus_platform_params; + qemu_add_machine_init_done_notifier(¬ifier->notifier); + vbi->bootinfo.ram_size = machine->ram_size; vbi->bootinfo.kernel_filename = machine->kernel_filename; vbi->bootinfo.kernel_cmdline = machine->kernel_cmdline; @@ -542,6 +597,8 @@ static void machvirt_init(MachineState *machine) vbi->bootinfo.loader_start = vbi->memmap[VIRT_MEM].base; vbi->bootinfo.get_dtb = machvirt_dtb; arm_load_kernel(ARM_CPU(first_cpu), &vbi->bootinfo); + + qemu_register_reset(machvirt_reset_device_tree, vbi); } static QEMUMachine machvirt_a15_machine = { @@ -549,6 +606,7 @@ static QEMUMachine machvirt_a15_machine = { .desc = "ARM Virtual Machine", .init = machvirt_init, .max_cpus = 4, + .has_dynamic_sysbus = true, }; static void machvirt_machine_init(void)