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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id y11si9765405qay.12.2014.07.31.06.31.48 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 31 Jul 2014 06:31:49 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:56764 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XCqSS-0000lZ-CS for patch@linaro.org; Thu, 31 Jul 2014 09:31:48 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51628) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XCq4J-00009C-2M for qemu-devel@nongnu.org; Thu, 31 Jul 2014 09:06:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XCq46-0001EQ-TS for qemu-devel@nongnu.org; Thu, 31 Jul 2014 09:06:50 -0400 Received: from static.88-198-71-155.clients.your-server.de ([88.198.71.155]:50089 helo=socrates.bennee.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XCq46-0001EA-Kh for qemu-devel@nongnu.org; Thu, 31 Jul 2014 09:06:38 -0400 Received: from localhost ([127.0.0.1] helo=zen.linaro.local) by socrates.bennee.com with esmtp (Exim 4.80) (envelope-from ) id 1XCqDw-0002HE-Vw; Thu, 31 Jul 2014 15:16:49 +0200 From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Date: Thu, 31 Jul 2014 14:06:25 +0100 Message-Id: <1406811992-6766-3-git-send-email-alex.bennee@linaro.org> X-Mailer: git-send-email 2.0.3 In-Reply-To: <1406811992-6766-1-git-send-email-alex.bennee@linaro.org> References: <1406811992-6766-1-git-send-email-alex.bennee@linaro.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 127.0.0.1 X-SA-Exim-Mail-From: alex.bennee@linaro.org X-SA-Exim-Scanned: No (on socrates.bennee.com); SAEximRunCond expanded to false X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 88.198.71.155 Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , l@dorileo.org, Richard Henderson Subject: [Qemu-devel] [PATCH v3 2/9] tcg: light re-factor and pass down TranslationBlock X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: alex.bennee@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.182 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 My later debugging patches need access to the origin PC. At the same time we have a slightly clumsy pass-by-reference access to the size of the translated block again for debugging purposes. To simplify the code I have expanded the TranslationBlock structure to include a tc_size variable to compliment the tc_ptr (and the subject pc, block size). This is set on code generation and then accessed directly by all the people that need it. I've also cleaned up some comments and removed un-used return variables. Signed-off-by: Alex Bennée --- v1 - checkpatch fixes diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 5e5d86e..ef4d165 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -78,8 +78,7 @@ void restore_state_to_opc(CPUArchState *env, struct TranslationBlock *tb, int pc_pos); void cpu_gen_init(void); -int cpu_gen_code(CPUArchState *env, struct TranslationBlock *tb, - int *gen_code_size_ptr); +void cpu_gen_code(CPUArchState *env, struct TranslationBlock *tb); bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc); void page_size_init(void); @@ -147,6 +146,7 @@ struct TranslationBlock { #define CF_LAST_IO 0x8000 /* Last insn may be an IO access. */ void *tc_ptr; /* pointer to the translated code */ + uint32_t tc_size;/* size of translated code */ /* next matching tb for physical address. */ struct TranslationBlock *phys_hash_next; /* first and second physical page containing code. The lower bit diff --git a/tcg/tcg.c b/tcg/tcg.c index c068990..1ed085c 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -2414,8 +2414,7 @@ static void dump_op_count(void) #endif -static inline int tcg_gen_code_common(TCGContext *s, - tcg_insn_unit *gen_code_buf, +static inline int tcg_gen_code_common(TCGContext *s, TranslationBlock *tb, long search_pc) { TCGOpcode opc; @@ -2423,6 +2422,10 @@ static inline int tcg_gen_code_common(TCGContext *s, const TCGOpDef *def; const TCGArg *args; + /* if we are coming via cpu_restore_state we already have a + generated block */ + g_assert(tb->tc_size == 0 || search_pc > 0); + #ifdef DEBUG_DISAS if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) { qemu_log("OP:\n"); @@ -2461,8 +2464,8 @@ static inline int tcg_gen_code_common(TCGContext *s, tcg_reg_alloc_start(s); - s->code_buf = gen_code_buf; - s->code_ptr = gen_code_buf; + s->code_buf = tb->tc_ptr; + s->code_ptr = tb->tc_ptr; tcg_out_tb_init(s); @@ -2544,7 +2547,7 @@ static inline int tcg_gen_code_common(TCGContext *s, return -1; } -int tcg_gen_code(TCGContext *s, tcg_insn_unit *gen_code_buf) +void tcg_gen_code(TCGContext *s, TranslationBlock *tb) { #ifdef CONFIG_PROFILER { @@ -2560,22 +2563,23 @@ int tcg_gen_code(TCGContext *s, tcg_insn_unit *gen_code_buf) } #endif - tcg_gen_code_common(s, gen_code_buf, -1); + tcg_gen_code_common(s, tb, -1); /* flush instruction cache */ flush_icache_range((uintptr_t)s->code_buf, (uintptr_t)s->code_ptr); - return tcg_current_code_size(s); + tb->tc_size = tcg_current_code_size(s); + return; } /* Return the index of the micro operation such as the pc after is < offset bytes from the start of the TB. The contents of gen_code_buf must not be changed, though writing the same values is ok. Return -1 if not found. */ -int tcg_gen_code_search_pc(TCGContext *s, tcg_insn_unit *gen_code_buf, +int tcg_gen_code_search_pc(TCGContext *s, TranslationBlock *tb, long offset) { - return tcg_gen_code_common(s, gen_code_buf, offset); + return tcg_gen_code_common(s, tb, offset); } #ifdef CONFIG_PROFILER diff --git a/tcg/tcg.h b/tcg/tcg.h index 997a704..95826f5 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -583,9 +583,8 @@ void tcg_context_init(TCGContext *s); void tcg_prologue_init(TCGContext *s); void tcg_func_start(TCGContext *s); -int tcg_gen_code(TCGContext *s, tcg_insn_unit *gen_code_buf); -int tcg_gen_code_search_pc(TCGContext *s, tcg_insn_unit *gen_code_buf, - long offset); +void tcg_gen_code(TCGContext *s, TranslationBlock *tb); +int tcg_gen_code_search_pc(TCGContext *s, TranslationBlock *tb, long offset); void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size); diff --git a/translate-all.c b/translate-all.c index 2af0774..402112c 100644 --- a/translate-all.c +++ b/translate-all.c @@ -153,17 +153,12 @@ void cpu_gen_init(void) tcg_context_init(&tcg_ctx); } -/* return non zero if the very first instruction is invalid so that - the virtual CPU can trigger an exception. - - '*gen_code_size_ptr' contains the size of the generated code (host - code). +/* code generation. On return tb->tc_size will reflect the size of + * generated code. */ -int cpu_gen_code(CPUArchState *env, TranslationBlock *tb, int *gen_code_size_ptr) +void cpu_gen_code(CPUArchState *env, TranslationBlock *tb) { TCGContext *s = &tcg_ctx; - tcg_insn_unit *gen_code_buf; - int gen_code_size; #ifdef CONFIG_PROFILER int64_t ti; #endif @@ -178,7 +173,6 @@ int cpu_gen_code(CPUArchState *env, TranslationBlock *tb, int *gen_code_size_ptr gen_intermediate_code(env, tb); /* generate machine code */ - gen_code_buf = tb->tc_ptr; tb->tb_next_offset[0] = 0xffff; tb->tb_next_offset[1] = 0xffff; s->tb_next_offset = tb->tb_next_offset; @@ -195,24 +189,23 @@ int cpu_gen_code(CPUArchState *env, TranslationBlock *tb, int *gen_code_size_ptr s->interm_time += profile_getclock() - ti; s->code_time -= profile_getclock(); #endif - gen_code_size = tcg_gen_code(s, gen_code_buf); - *gen_code_size_ptr = gen_code_size; + tcg_gen_code(s, tb); + #ifdef CONFIG_PROFILER s->code_time += profile_getclock(); s->code_in_len += tb->size; - s->code_out_len += gen_code_size; + s->code_out_len += tb->tc_size; #endif - tb_write_perfmap(gen_code_buf, gen_code_size, tb->pc); + tb_write_perfmap(tb->tc_ptr, tb->tc_size, tb->pc); #ifdef DEBUG_DISAS if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) { - qemu_log("OUT: [size=%d]\n", gen_code_size); - log_disas(tb->tc_ptr, gen_code_size); + qemu_log("OUT: [size=%d]\n", tb->tc_size); + log_disas(tb->tc_ptr, tb->tc_size); qemu_log("\n"); qemu_log_flush(); } #endif - return 0; } /* The cpu state corresponding to 'searched_pc' is restored. @@ -223,7 +216,6 @@ static int cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb, CPUArchState *env = cpu->env_ptr; TCGContext *s = &tcg_ctx; int j; - uintptr_t tc_ptr; #ifdef CONFIG_PROFILER int64_t ti; #endif @@ -243,9 +235,9 @@ static int cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb, } /* find opc index corresponding to search_pc */ - tc_ptr = (uintptr_t)tb->tc_ptr; - if (searched_pc < tc_ptr) + if (searched_pc < (uintptr_t) tb->tc_ptr) { return -1; + } s->tb_next_offset = tb->tb_next_offset; #ifdef USE_DIRECT_JUMP @@ -255,8 +247,8 @@ static int cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb, s->tb_jmp_offset = NULL; s->tb_next = tb->tb_next; #endif - j = tcg_gen_code_search_pc(s, (tcg_insn_unit *)tc_ptr, - searched_pc - tc_ptr); + j = tcg_gen_code_search_pc(s, tb, + searched_pc - (uintptr_t) tb->tc_ptr); if (j < 0) return -1; /* now find start of instruction before */ @@ -1059,7 +1051,6 @@ TranslationBlock *tb_gen_code(CPUState *cpu, TranslationBlock *tb; tb_page_addr_t phys_pc, phys_page2; target_ulong virt_page2; - int code_gen_size; phys_pc = get_page_addr_code(env, pc); tb = tb_alloc(pc); @@ -1072,12 +1063,14 @@ TranslationBlock *tb_gen_code(CPUState *cpu, tcg_ctx.tb_ctx.tb_invalidated_flag = 1; } tb->tc_ptr = tcg_ctx.code_gen_ptr; + tb->tc_size = 0; tb->cs_base = cs_base; tb->flags = flags; tb->cflags = cflags; - cpu_gen_code(env, tb, &code_gen_size); - tcg_ctx.code_gen_ptr = (void *)(((uintptr_t)tcg_ctx.code_gen_ptr + - code_gen_size + CODE_GEN_ALIGN - 1) & ~(CODE_GEN_ALIGN - 1)); + cpu_gen_code(env, tb); + tcg_ctx.code_gen_ptr = (void *) ( + ((uintptr_t) tcg_ctx.code_gen_ptr + tb->tc_size + CODE_GEN_ALIGN - 1) + & ~(CODE_GEN_ALIGN - 1)); /* check next page if needed */ virt_page2 = (pc + tb->size - 1) & TARGET_PAGE_MASK;