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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id p1si11689610qak.64.2014.07.15.04.43.34 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 15 Jul 2014 04:43:34 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:34073 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X718w-0003CC-K4 for patch@linaro.org; Tue, 15 Jul 2014 07:43:34 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40220) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X7174-0000r3-8i for qemu-devel@nongnu.org; Tue, 15 Jul 2014 07:41:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1X716y-0003YJ-IZ for qemu-devel@nongnu.org; Tue, 15 Jul 2014 07:41:38 -0400 Received: from static.88-198-71-155.clients.your-server.de ([88.198.71.155]:59345 helo=socrates.bennee.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1X716y-0003YD-AL for qemu-devel@nongnu.org; Tue, 15 Jul 2014 07:41:32 -0400 Received: from localhost ([127.0.0.1] helo=zen.linaro.local) by socrates.bennee.com with esmtp (Exim 4.80) (envelope-from ) id 1X71Cx-0007um-6o; Tue, 15 Jul 2014 13:47:43 +0200 From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: stefanha@redhat.com Date: Tue, 15 Jul 2014 12:42:21 +0100 Message-Id: <1405424541-21803-4-git-send-email-alex.bennee@linaro.org> X-Mailer: git-send-email 2.0.1 In-Reply-To: <1405424541-21803-1-git-send-email-alex.bennee@linaro.org> References: <1405424541-21803-1-git-send-email-alex.bennee@linaro.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 127.0.0.1 X-SA-Exim-Mail-From: alex.bennee@linaro.org X-SA-Exim-Scanned: No (on socrates.bennee.com); SAEximRunCond expanded to false X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 88.198.71.155 Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-devel@nongnu.org, =?UTF-8?q?Andreas=20F=C3=A4rber?= , mohamad.gebai@gmail.com Subject: [Qemu-devel] [PATCH v2 3/3] trace: instrument and trace tcg tb flush activity X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: alex.bennee@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.220.179 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 The tb_find_fast path is important to quickly moving from one block to the next. However we need to flush it when tlb changes occur so it's important to know how well we are doing with the cache. This patch adds some basic hit/miss profiling to the tb_find_fast tracepoint as well as a number of other tb_ related areas. I've also added a trace_inc_counter() helper which gets inlined away when tracing is disabled. Signed-off-by: Alex Bennée diff --git a/cpu-exec.c b/cpu-exec.c index 45ef77b..771272f 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -187,7 +187,10 @@ static inline TranslationBlock *tb_find_fast(CPUArchState *env) tb = cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]; if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base || tb->flags != flags)) { + trace_inc_counter(&cpu->tb_jmp_cache_stats.misses); tb = tb_find_slow(env, pc, cs_base, flags); + } else { + trace_inc_counter(&cpu->tb_jmp_cache_stats.hits); } return tb; } diff --git a/cputlb.c b/cputlb.c index 7bd3573..672656a 100644 --- a/cputlb.c +++ b/cputlb.c @@ -58,7 +58,7 @@ void tlb_flush(CPUState *cpu, int flush_global) cpu->current_tb = NULL; memset(env->tlb_table, -1, sizeof(env->tlb_table)); - memset(cpu->tb_jmp_cache, 0, sizeof(cpu->tb_jmp_cache)); + tb_flush_all_jmp_cache(cpu); env->tlb_flush_addr = -1; env->tlb_flush_mask = 0; diff --git a/include/qom/cpu.h b/include/qom/cpu.h index df977c8..8376678 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -243,6 +243,10 @@ struct CPUState { void *env_ptr; /* CPUArchState */ struct TranslationBlock *current_tb; struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; + struct { + int hits; + int misses; + } tb_jmp_cache_stats; struct GDBRegisterState *gdb_regs; int gdb_num_regs; int gdb_num_g_regs; @@ -584,6 +588,15 @@ void cpu_exit(CPUState *cpu); */ void cpu_resume(CPUState *cpu); + +/** + * tb_flush_all_jmp_cache: + * @cpu: The CPU jmp cache to flush + * + * Flush all the entries from the cpu fast jump cache + */ +void tb_flush_all_jmp_cache(CPUState *cpu); + /** * qemu_init_vcpu: * @cpu: The vCPU to initialize. diff --git a/include/trace.h b/include/trace.h index c15f498..7a9c0dc 100644 --- a/include/trace.h +++ b/include/trace.h @@ -3,4 +3,14 @@ #include "trace/generated-tracers.h" +#ifndef CONFIG_TRACE_NOP +static inline void trace_inc_counter(int *counter) { + int cnt = *counter; + cnt++; + *counter = cnt; +} +#else +static inline void trace_inc_counter(int *counter) { /* do nothing */ } +#endif + #endif /* TRACE_H */ diff --git a/qom/cpu.c b/qom/cpu.c index fada2d4..956b36d 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -244,7 +244,7 @@ static void cpu_common_reset(CPUState *cpu) cpu->icount_extra = 0; cpu->icount_decr.u32 = 0; cpu->can_do_io = 0; - memset(cpu->tb_jmp_cache, 0, TB_JMP_CACHE_SIZE * sizeof(void *)); + tb_flush_all_jmp_cache(cpu); } static bool cpu_common_has_work(CPUState *cs) diff --git a/trace-events b/trace-events index f8cc35f..5a58a11 100644 --- a/trace-events +++ b/trace-events @@ -1244,6 +1244,9 @@ exec_tb_exit(void *next_tb, unsigned int flags) "tb:%p flags=%x" # translate-all.c translate_block(void *tb, uintptr_t pc, uint8_t *tb_code) "tb:%p, pc:0x%x, tb_code:%p" +tb_flush(void) "" +tb_flush_jump_cache(uintptr_t pc) "pc:0x%x" +tb_flush_all_jump_cache(int hits, int misses) "hits:%d misses:%d" # memory.c memory_region_ops_read(void *mr, uint64_t addr, uint64_t value, unsigned size) "mr %p addr %#"PRIx64" value %#"PRIx64" size %u" diff --git a/translate-all.c b/translate-all.c index a11c083..8e7bbcc 100644 --- a/translate-all.c +++ b/translate-all.c @@ -714,12 +714,22 @@ static void page_flush_tb(void) } } +void tb_flush_all_jmp_cache(CPUState *cpu) +{ + trace_tb_flush_all_jump_cache(cpu->tb_jmp_cache_stats.hits, + cpu->tb_jmp_cache_stats.misses); + memset(cpu->tb_jmp_cache, 0, sizeof(cpu->tb_jmp_cache)); + memset((void *) &cpu->tb_jmp_cache_stats, 0, sizeof(cpu->tb_jmp_cache_stats)); +} + /* flush all the translation blocks */ /* XXX: tb_flush is currently not thread safe */ void tb_flush(CPUArchState *env1) { CPUState *cpu = ENV_GET_CPU(env1); + trace_tb_flush(); + #if defined(DEBUG_FLUSH) printf("qemu: flush code_size=%ld nb_tbs=%d avg_tb_size=%ld\n", (unsigned long)(tcg_ctx.code_gen_ptr - tcg_ctx.code_gen_buffer), @@ -734,7 +744,7 @@ void tb_flush(CPUArchState *env1) tcg_ctx.tb_ctx.nb_tbs = 0; CPU_FOREACH(cpu) { - memset(cpu->tb_jmp_cache, 0, sizeof(cpu->tb_jmp_cache)); + tb_flush_all_jmp_cache(cpu); } memset(tcg_ctx.tb_ctx.tb_phys_hash, 0, sizeof(tcg_ctx.tb_ctx.tb_phys_hash)); @@ -1520,6 +1530,8 @@ void tb_flush_jmp_cache(CPUState *cpu, target_ulong addr) i = tb_jmp_cache_hash_page(addr); memset(&cpu->tb_jmp_cache[i], 0, TB_JMP_PAGE_SIZE * sizeof(TranslationBlock *)); + + trace_tb_flush_jump_cache(addr); } void dump_exec_info(FILE *f, fprintf_function cpu_fprintf)