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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id c11si9138583qgc.99.2014.06.15.23.56.51 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Sun, 15 Jun 2014 23:56:51 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:41846 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WwQqZ-0002jL-Cf for patch@linaro.org; Mon, 16 Jun 2014 02:56:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54160) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WwQo0-0006sQ-71 for qemu-devel@nongnu.org; Mon, 16 Jun 2014 02:54:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WwQnu-0003c8-90 for qemu-devel@nongnu.org; Mon, 16 Jun 2014 02:54:12 -0400 Received: from mail-pd0-f174.google.com ([209.85.192.174]:33302) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WwQnu-0003c2-0u for qemu-devel@nongnu.org; Mon, 16 Jun 2014 02:54:06 -0400 Received: by mail-pd0-f174.google.com with SMTP id y10so4083234pdj.5 for ; Sun, 15 Jun 2014 23:54:05 -0700 (PDT) X-Received: by 10.68.254.103 with SMTP id ah7mr8371913pbd.159.1402901645180; Sun, 15 Jun 2014 23:54:05 -0700 (PDT) Received: from pnqlab006.amcc.com ([182.73.239.130]) by mx.google.com with ESMTPSA id op3sm16777787pbc.40.2014.06.15.23.54.01 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 15 Jun 2014 23:54:04 -0700 (PDT) From: Pranavkumar Sawargaonkar To: qemu-devel@nongnu.org Date: Mon, 16 Jun 2014 12:23:21 +0530 Message-Id: <1402901605-24551-5-git-send-email-pranavkumar@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1402901605-24551-1-git-send-email-pranavkumar@linaro.org> References: <1402901605-24551-1-git-send-email-pranavkumar@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.192.174 Cc: peter.maydell@linaro.org, Anup Patel , patches@apm.com, robherring2@gmail.com, kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, Pranavkumar Sawargaonkar Subject: [Qemu-devel] [PATCH V7 4/8] target-arm: Common kvm_arm_vcpu_init() for KVM ARM and KVM ARM64 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: pranavkumar@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.179 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Introduce a common kvm_arm_vcpu_init() for doing KVM_ARM_VCPU_INIT ioctl in KVM ARM and KVM ARM64. This also helps us factor-out few common code lines from kvm_arch_init_vcpu() for KVM ARM/ARM64. Signed-off-by: Pranavkumar Sawargaonkar Signed-off-by: Anup Patel Reviewed-by: Peter Maydell --- target-arm/cpu-qom.h | 3 +++ target-arm/kvm.c | 11 +++++++++++ target-arm/kvm32.c | 12 +++++++----- target-arm/kvm64.c | 18 +++++++++++------- target-arm/kvm_arm.h | 12 ++++++++++++ 5 files changed, 44 insertions(+), 12 deletions(-) diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h index edc7f26..2bd7df8 100644 --- a/target-arm/cpu-qom.h +++ b/target-arm/cpu-qom.h @@ -102,6 +102,9 @@ typedef struct ARMCPU { */ uint32_t kvm_target; + /* KVM init features for this CPU */ + uint32_t kvm_init_features[7]; + /* The instance init functions for implementation-specific subclasses * set these fields to specify the implementation-dependent values of * various constant registers and reset values of non-constant diff --git a/target-arm/kvm.c b/target-arm/kvm.c index 39202d7..319784d 100644 --- a/target-arm/kvm.c +++ b/target-arm/kvm.c @@ -27,6 +27,17 @@ const KVMCapabilityInfo kvm_arch_required_capabilities[] = { KVM_CAP_LAST_INFO }; +int kvm_arm_vcpu_init(CPUState *cs) +{ + ARMCPU *cpu = ARM_CPU(cs); + struct kvm_vcpu_init init; + + init.target = cpu->kvm_target; + memcpy(init.features, cpu->kvm_init_features, sizeof(init.features)); + + return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init); +} + bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try, int *fdarray, struct kvm_vcpu_init *init) diff --git a/target-arm/kvm32.c b/target-arm/kvm32.c index b79750c..b142e90 100644 --- a/target-arm/kvm32.c +++ b/target-arm/kvm32.c @@ -166,7 +166,6 @@ static int compare_u64(const void *a, const void *b) int kvm_arch_init_vcpu(CPUState *cs) { - struct kvm_vcpu_init init; int i, ret, arraylen; uint64_t v; struct kvm_one_reg r; @@ -179,15 +178,18 @@ int kvm_arch_init_vcpu(CPUState *cs) return -EINVAL; } - init.target = cpu->kvm_target; - memset(init.features, 0, sizeof(init.features)); + /* Determine init features for this CPU */ + memset(cpu->kvm_init_features, 0, sizeof(cpu->kvm_init_features)); if (cpu->start_powered_off) { - init.features[0] = 1 << KVM_ARM_VCPU_POWER_OFF; + cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_POWER_OFF; } - ret = kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init); + + /* Do KVM_ARM_VCPU_INIT ioctl */ + ret = kvm_arm_vcpu_init(cs); if (ret) { return ret; } + /* Query the kernel to make sure it supports 32 VFP * registers: QEMU's "cortex-a15" CPU is always a * VFP-D32 core. The simplest way to do this is just diff --git a/target-arm/kvm64.c b/target-arm/kvm64.c index 70f311b..9936aa8 100644 --- a/target-arm/kvm64.c +++ b/target-arm/kvm64.c @@ -77,9 +77,8 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUClass *ahcc) int kvm_arch_init_vcpu(CPUState *cs) { - ARMCPU *cpu = ARM_CPU(cs); - struct kvm_vcpu_init init; int ret; + ARMCPU *cpu = ARM_CPU(cs); if (cpu->kvm_target == QEMU_KVM_ARM_TARGET_NONE || !arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { @@ -87,16 +86,21 @@ int kvm_arch_init_vcpu(CPUState *cs) return -EINVAL; } - init.target = cpu->kvm_target; - memset(init.features, 0, sizeof(init.features)); + /* Determine init features for this CPU */ + memset(cpu->kvm_init_features, 0, sizeof(cpu->kvm_init_features)); if (cpu->start_powered_off) { - init.features[0] = 1 << KVM_ARM_VCPU_POWER_OFF; + cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_POWER_OFF; + } + + /* Do KVM_ARM_VCPU_INIT ioctl */ + ret = kvm_arm_vcpu_init(cs); + if (ret) { + return ret; } - ret = kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init); /* TODO : support for save/restore/reset of system regs via tuple list */ - return ret; + return 0; } #define AARCH64_CORE_REG(x) (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \ diff --git a/target-arm/kvm_arm.h b/target-arm/kvm_arm.h index dc4e233..af93105 100644 --- a/target-arm/kvm_arm.h +++ b/target-arm/kvm_arm.h @@ -15,6 +15,18 @@ #include "exec/memory.h" /** + * kvm_arm_vcpu_init: + * @cs: CPUState + * + * Initialize (or reinitialize) the VCPU by invoking the + * KVM_ARM_VCPU_INIT ioctl with the CPU type and feature + * bitmask specified in the CPUState. + * + * Returns: 0 if success else < 0 error code + */ +int kvm_arm_vcpu_init(CPUState *cs); + +/** * kvm_arm_register_device: * @mr: memory region for this device * @devid: the KVM device ID