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[2001:8b0:1d0::1]) by mx.google.com with ESMTPS id c6si972951laa.86.2014.05.09.08.56.06 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Fri, 09 May 2014 08:56:07 -0700 (PDT) Received-SPF: none (google.com: pm215@archaic.org.uk does not designate permitted sender hosts) client-ip=2001:8b0:1d0::1; Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1Win9Y-0005UR-Fi; Fri, 09 May 2014 16:56:04 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, Anthony Liguori , =?UTF-8?q?Andreas=20F=C3=A4rber?= Subject: [PATCH v2 3/4] a9scu: Use qom_private to mark private fields Date: Fri, 9 May 2014 16:56:03 +0100 Message-Id: <1399650964-21067-4-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1399650964-21067-1-git-send-email-peter.maydell@linaro.org> References: <1399650964-21067-1-git-send-email-peter.maydell@linaro.org> X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: peter.maydell@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.128.171 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Use the new qom_private infrastructure to mark private fields in the QOM device struct. Signed-off-by: Peter Maydell --- hw/misc/a9scu.c | 2 ++ include/hw/misc/a9scu.h | 16 +++++++++++----- 2 files changed, 13 insertions(+), 5 deletions(-) diff --git a/hw/misc/a9scu.c b/hw/misc/a9scu.c index 4434945..81587b6 100644 --- a/hw/misc/a9scu.c +++ b/hw/misc/a9scu.c @@ -8,6 +8,8 @@ * This code is licensed under the GPL. */ +#define IMPLEMENTING_A9_SCU + #include "hw/misc/a9scu.h" static uint64_t a9_scu_read(void *opaque, hwaddr offset, diff --git a/include/hw/misc/a9scu.h b/include/hw/misc/a9scu.h index efb0c30..86dd21f 100644 --- a/include/hw/misc/a9scu.h +++ b/include/hw/misc/a9scu.h @@ -14,15 +14,21 @@ /* A9MP private memory region. */ +#ifdef IMPLEMENTING_A9_SCU +#define qom_private +#else +#define qom_private QEMU_PRIVATE_ATTR +#endif + typedef struct A9SCUState { /*< private >*/ - SysBusDevice parent_obj; + qom_private SysBusDevice parent_obj; /*< public >*/ - MemoryRegion iomem; - uint32_t control; - uint32_t status; - uint32_t num_cpu; + qom_private MemoryRegion iomem; + qom_private uint32_t control; + qom_private uint32_t status; + qom_private uint32_t num_cpu; } A9SCUState; #define TYPE_A9_SCU "a9-scu"