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[72.48.77.163]) by mx.google.com with ESMTPSA id dw5sm20133189obb.0.2014.05.05.09.00.41 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 05 May 2014 09:00:42 -0700 (PDT) From: Rob Herring To: Peter Maydell Date: Mon, 5 May 2014 11:00:23 -0500 Message-Id: <1399305623-22016-8-git-send-email-robherring2@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1399305623-22016-1-git-send-email-robherring2@gmail.com> References: <1399305623-22016-1-git-send-email-robherring2@gmail.com> X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2607:f8b0:4003:c02::22d Cc: Rob Herring , qemu-devel@nongnu.org, Christoffer Dall Subject: [Qemu-devel] [PATCH 7/7] arm/highbank: enable PSCI emulation support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Original-Sender: robherring2@gmail.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: patch+caf_=patchwork-forward=linaro.org@linaro.org does not designate permitted sender hosts) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org; dkim=fail header.i=@gmail.com; dmarc=fail (p=NONE dis=NONE) header.from=gmail.com Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Rob Herring Enable PSCI enulation on highbank and midway platforms. Note that this requires fixing the PSCI function IDs in the DTB to match what QEMU is using. This should get fixed. Signed-off-by: Rob Herring --- hw/arm/highbank.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index 46b9f1e..092df1f 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -242,6 +242,14 @@ static void calxeda_init(QEMUMachineInitArgs *args, enum cxmachines machine) cpuobj = object_new(object_class_get_name(oc)); cpu = ARM_CPU(cpuobj); + object_property_set_int(cpuobj, QEMU_PSCI_METHOD_SMC, "psci-method", + NULL); + + /* Secondary CPUs start in PSCI powered-down state */ + if (n > 0) { + object_property_set_bool(cpuobj, true, "start-powered-off", NULL); + } + if (object_property_find(cpuobj, "reset-cbar", NULL)) { object_property_set_int(cpuobj, MPCORE_PERIPHBASE, "reset-cbar", &error_abort);