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X-Received-From: 2607:f8b0:4003:c01::235 Cc: Rob Herring , qemu-devel@nongnu.org, Christoffer Dall Subject: [Qemu-devel] [PATCH 1/7] target-arm: use correct do_interrupt handler for AArch64 user mode X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Original-Sender: robherring2@gmail.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: patch+caf_=patchwork-forward=linaro.org@linaro.org does not designate permitted sender hosts) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org; dkim=fail header.i=@gmail.com; dmarc=fail (p=NONE dis=NONE) header.from=gmail.com Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 From: Rob Herring User mode emulation should never get interrupts and thus should not use the system emulation exception handler function. Signed-off-by: Rob Herring --- target-arm/cpu64.c | 4 ++++ target-arm/helper-a64.c | 3 +++ 2 files changed, 7 insertions(+) diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c index 8daa622..98d402f 100644 --- a/target-arm/cpu64.c +++ b/target-arm/cpu64.c @@ -187,7 +187,11 @@ static void aarch64_cpu_class_init(ObjectClass *oc, void *data) { CPUClass *cc = CPU_CLASS(oc); +#if defined(CONFIG_USER_ONLY) + cc->do_interrupt = arm_cpu_do_interrupt; +#else cc->do_interrupt = aarch64_cpu_do_interrupt; +#endif cc->set_pc = aarch64_cpu_set_pc; cc->gdb_read_register = aarch64_cpu_gdb_read_register; cc->gdb_write_register = aarch64_cpu_gdb_write_register; diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c index bf921cc..84411b4 100644 --- a/target-arm/helper-a64.c +++ b/target-arm/helper-a64.c @@ -438,6 +438,8 @@ float32 HELPER(fcvtx_f64_to_f32)(float64 a, CPUARMState *env) return r; } +#if !defined(CONFIG_USER_ONLY) + /* Handle a CPU exception. */ void aarch64_cpu_do_interrupt(CPUState *cs) { @@ -512,3 +514,4 @@ void aarch64_cpu_do_interrupt(CPUState *cs) env->pc = addr; cs->interrupt_request |= CPU_INTERRUPT_EXITTB; } +#endif