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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id jl9si4150365qcb.18.2014.05.05.02.02.39 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 05 May 2014 02:02:39 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Received: from localhost ([::1]:56112 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WhEnH-0002n2-GT for patch@linaro.org; Mon, 05 May 2014 05:02:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47598) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WhEmj-0002DH-OX for qemu-devel@nongnu.org; Mon, 05 May 2014 05:02:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WhEmd-0000C6-SS for qemu-devel@nongnu.org; Mon, 05 May 2014 05:02:05 -0400 Received: from mail-pa0-f43.google.com ([209.85.220.43]:50401) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WhEmd-0000Bw-NY for qemu-devel@nongnu.org; Mon, 05 May 2014 05:01:59 -0400 Received: by mail-pa0-f43.google.com with SMTP id bj1so1854117pad.2 for ; Mon, 05 May 2014 02:01:58 -0700 (PDT) X-Received: by 10.66.150.228 with SMTP id ul4mr69952563pab.16.1399280518710; Mon, 05 May 2014 02:01:58 -0700 (PDT) Received: from pnqlab006.amcc.com ([182.73.239.130]) by mx.google.com with ESMTPSA id xo9sm66143243pab.18.2014.05.05.02.01.52 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 05 May 2014 02:01:57 -0700 (PDT) From: Pranavkumar Sawargaonkar To: qemu-devel@nongnu.org Date: Mon, 5 May 2014 14:31:41 +0530 Message-Id: <1399280501-25512-1-git-send-email-pranavkumar@linaro.org> X-Mailer: git-send-email 1.7.9.5 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.220.43 Cc: peter.maydell@linaro.org, Anup Patel , patches@apm.com, robherring2@gmail.com, kvmarm@lists.cs.columbia.edu, christoffer.dall@linaro.org, Pranavkumar Sawargaonkar Subject: [Qemu-devel] [RFC PATCH V4 6/6] target-arm: Implement kvm_arch_reset_vcpu() for KVM ARM64 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: pranavkumar@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: patch+caf_=patchwork-forward=linaro.org@linaro.org does not designate permitted sender hosts) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 To implement kvm_arch_reset_vcpu(), we simply re-init the VCPU using kvm_arm_vcpu_init() so that all registers of VCPU are set to their reset values by in-kernel KVM code. Signed-off-by: Pranavkumar Sawargaonkar Signed-off-by: Anup Patel --- target-arm/kvm64.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target-arm/kvm64.c b/target-arm/kvm64.c index f7cc3ef..4855b4b 100644 --- a/target-arm/kvm64.c +++ b/target-arm/kvm64.c @@ -259,4 +259,8 @@ int kvm_arch_get_registers(CPUState *cs) void kvm_arch_reset_vcpu(CPUState *cs) { + /* Re-init VCPU so that all registers are set to + * their respective reset values. + */ + kvm_arm_vcpu_init(cs, 0x0); }